activity
20212026
collaborators

5 papers

cs.AR2026

Symbolic Polyhedral-Based Energy Analysis for Nested Loop Programs

Avinash Mahesh Nirmala, Dominik Walter, Frank Hannig +1

This work presents a symbolic approach for estimating the energy consumption for nested loop programs when mapped and scheduled on parallel processor array accelerator architecture…

cs.AR2026

Loop Control Management in Tightly Coupled Processor Arrays (TCPAs)

Dominik Walter, Frank Hannig, Jürgen Teich

Multidimensional loop kernels often suffer from control overhead that can dominate execution time on parallel loop accelerators. Tightly Coupled Processor Arrays (TCPAs) offload lo…

cs.AR2025

Evaluation of CGRA Toolchains

Dominik Walter, Marita Halm, Daniel Seidel +4

Increasing demands for computing power also propel the need for energy-efficient SoC accelerator architectures. One class for such accelerators are so-called processor arrays, whic…

cs.AR2025

Mapping and Execution of Nested Loops on Processor Arrays: CGRAs vs. TCPAs

Dominik Walter, Marita Halm, Daniel Seidel +4

Increasing demands for computing power also propel the need for energy-efficient SoC accelerator architectures. One class of such accelerators are so-called processor arrays, which…

cs.DC2021

Symbolic Loop Compilation for Tightly Coupled Processor Arrays

Michael Witterauf, Dominik Walter, Frank Hannig +1

Loop compilation for Tightly Coupled Processor Arrays (TCPAs), a class of massively parallel loop accelerators, entails solving NP-hard problems, yet depends on the loop bounds and…