activity
20212026
collaborators

6 papers

cs.AR2026

Harvesting AI Computation at the Edge via Generic Approximation

Yihan Wang, Huiru Yan, Luxin Zhang +6

With the widespread adoption of AI in various IoT scenarios such as smart sensing and processing, AI chips have become a common component at the edge. These chips are typically spe…

cs.AR2026

VeriPilot: An LLM-Powered Verilog Debugging Framework

Yihan Wang, Cheng Liu, Jiazheng Zhang +4

Verilog debugging remains one of the most time-consuming stages in digital circuit design. Recent advances in Large Language Models (LLMs) have enabled automated debugging; however…

cs.AR2024

MCU-MixQ: A HW/SW Co-optimized Mixed-precision Neural Network Design Framework for MCUs

Junfeng Gong, Cheng Liu, Long Cheng +2

Mixed-precision neural network (MPNN) that utilizes just enough data width for the neural network processing is an effective approach to meet the stringent resources constraints in…

cs.LG2022

Statistical Modeling of Soft Error Influence on Neural Networks

Haitong Huang, Xinghua Xue, Cheng Liu +5

Soft errors in large VLSI circuits pose dramatic influence on computing- and memory-intensive neural network (NN) processing. Understanding the influence of soft errors on NNs is c…

cs.AR2021

R2F: A Remote Retraining Framework for AIoT Processors with Computing Errors

Dawen Xu, Meng He, Cheng Liu +5

AIoT processors fabricated with newer technology nodes suffer rising soft errors due to the shrinking transistor sizes and lower power supply. Soft errors on the AIoT processors pa…

eess.SY2021

MPC-CSAS: Multi-Party Computation for Real-time Privacy-preserving Speed Advisory Systems

Mingming Liu, Long Cheng, Yingqi Gu +3

As a part of Advanced Driver Assistance Systems (ADASs), Consensus-based Speed Advisory Systems (CSAS) have been proposed to recommend a common speed to a group of vehicles for spe…