activity
20142024
most citedExploiting Errors for Efficiency: A Survey from Circuits to Algorithms

15 citations · 24 across the 9 of their papers we have counts for

collaborators

9 papers

cs.DC2024

Distributed Convolutional Neural Network Training on Mobile and Edge Clusters

Pranav Rama, Madison Threadgill, Andreas Gerstlauer

The training of deep and/or convolutional neural networks (DNNs/CNNs) is traditionally done on servers with powerful CPUs and GPUs. Recent efforts have emerged to localize machine…

cs.LG2024

A Survey of Distributed Learning in Cloud, Mobile, and Edge Settings

Madison Threadgill, Andreas Gerstlauer

In the era of deep learning (DL), convolutional neural networks (CNNs), and large language models (LLMs), machine learning (ML) models are becoming increasingly complex, demanding…

cs.AR2024

Efficient Approaches for GEMM Acceleration on Leading AI-Optimized FPGAs

Endri Taka, Dimitrios Gourounas, Andreas Gerstlauer +2

FPGAs are a promising platform for accelerating Deep Learning (DL) applications, due to their high performance, low power consumption, and reconfigurability. Recently, the leading…

cs.AR2023★ 2 cited

Lightweight ML-based Runtime Prefetcher Selection on Many-core Platforms

Erika S. Alcorta, Mahesh Madhav, Scott Tetrick +2

Modern computer designs support composite prefetching, where multiple individual prefetcher components are used to target different memory access patterns. However, multiple prefet…

cs.LG2021★ 3 cited

MAFAT: Memory-Aware Fusing and Tiling of Neural Networks for Accelerated Edge Inference

Jackson Farley, Andreas Gerstlauer

A rising research challenge is running costly machine learning (ML) networks locally on resource-constrained edge devices. ML networks with large convolutional layers can easily ex…

cs.AR2021

Virtual-Link: A Scalable Multi-Producer, Multi-Consumer Message Queue Architecture for Cross-Core Communication

Qinzhe Wu, Jonathan Beard, Ashen Ekanayake +2

Cross-core communication is increasingly a bottleneck as the number of processing elements increase per system-on-chip. Typical hardware solutions to cross-core communication are o…