activity
20182026
most citedLearning-based Application-Agnostic 3D NoC Design for Heterogeneous Manycore Systems

65 citations · 78 across the 9 of their papers we have counts for

collaborators

9 papers

cs.AR2026

Building Reliable Arithmetic Multipliers Under NBTI Aging and Process Variations

Masoud Heidary, Biresh Kumar Joardar

Hardware aging poses a significant challenge for integrated circuits (ICs), leading to performance degradation and eventual failure. In this work, we focus on the aging of arithmet…

cs.CR2026

Attacking AI Accelerators by Leveraging Arithmetic Properties of Addition

Masoud Heidary, Biresh Kumar Joardar

The dependability of AI models relies largely on the reliability of the underlying computation hardware. Hardware aging attacks can compromise the computing substrate and disrupt A…

cs.ET2025

HePGA: A Heterogeneous Processing-in-Memory based GNN Training Accelerator

Chukwufumnanya Ogbogu, Gaurav Narang, Biresh Kumar Joardar +3

Processing-In-Memory (PIM) architectures offer a promising approach to accelerate Graph Neural Network (GNN) training and inference. However, various PIM devices such as ReRAM, FeF…

cs.AR2024★ 2 cited

FARe: Fault-Aware GNN Training on ReRAM-based PIM Accelerators

Pratyush Dhingra, Chukwufumnanya Ogbogu, Biresh Kumar Joardar +3

Resistive random-access memory (ReRAM)-based processing-in-memory (PIM) architecture is an attractive solution for training Graph Neural Networks (GNNs) on edge platforms. However,…

cs.AR2021★ 1 cited

ReaLPrune: ReRAM Crossbar-aware Lottery Ticket Pruned CNNs

Biresh Kumar Joardar, Janardhan Rao Doppa, Hai Li +2

Training machine learning (ML) models at the edge (on-chip training on end user devices) can address many pressing challenges including data privacy/security, increase the accessib…

cs.ET2021

Multi-Objective Optimization of ReRAM Crossbars for Robust DNN Inferencing under Stochastic Noise

Xiaoxuan Yang, Syrine Belakaria, Biresh Kumar Joardar +5

Resistive random-access memory (ReRAM) is a promising technology for designing hardware accelerators for deep neural network (DNN) inferencing. However, stochastic noise in ReRAM c…

cs.AR2021

ReGraphX: NoC-enabled 3D Heterogeneous ReRAM Architecture for Training Graph Neural Networks

Aqeeb Iqbal Arka, Biresh Kumar Joardar, Janardhan Rao Doppa +2

Graph Neural Network (GNN) is a variant of Deep Neural Networks (DNNs) operating on graphs. However, GNNs are more complex compared to traditional DNNs as they simultaneously exhib…

cs.AR2020★ 10 cited

HeM3D: Heterogeneous Manycore Architecture Based on Monolithic 3D Vertical Integration

Aqeeb Iqbal Arka, Biresh Kumar Joardar, Ryan Gary Kim +3

Heterogeneous manycore architectures are the key to efficiently execute compute- and data-intensive applications. Through silicon via (TSV)-based 3D manycore system is a promising…

cs.DC2018★ 65 cited

Learning-based Application-Agnostic 3D NoC Design for Heterogeneous Manycore Systems

Biresh Kumar Joardar, Ryan Gary Kim, Janardhan Rao Doppa +3

The rising use of deep learning and other big-data algorithms has led to an increasing demand for hardware platforms that are computationally powerful, yet energy-efficient. Due to…