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20112026
most citedIntegration of nanoscale memristor synapses in neuromorphic computing architectures

624 citations · 1.2k across the 19 of their papers we have counts for

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Showing cs.ETShow all

9 papers · 1 filter

cs.ET2026★ 4 cited

Update Disturbance-Resilient Analog ReRAM Crossbar Arrays for In-Memory Deep Learning Accelerators

Wooseok Choi, Tommaso Stecconi, Donato Francesco Falcone +14

Resistive memory (ReRAM) technologies with crossbar array architectures hold significant potential for analog AI accelerator hardware, enabling both in-memory inference and trainin…

cs.ET2023★ 16 cited

Empirical study on the efficiency of Spiking Neural Networks with axonal delays, and algorithm-hardware benchmarking

Alberto Patiño-Saucedo, Amirreza Yousefzadeh, Guangzhi Tang +3

The role of axonal synaptic delays in the efficacy and performance of artificial neural networks has been largely unexplored. In step-based analog-valued neural network models (ANN…

cs.ET2023★ 6 cited

A Fully Digital Relaxation-Aware Analog Programming Technique for HfOx RRAM Arrays

Hamidreza Erfanijazi, Luis A. Camuñas-Mesa, Elisa Vianello +2

For neuromorphic engineering to emulate the human brain, improving memory density with low power consumption is an indispensable but challenging goal. In this regard, emerging RRAM…

cs.ET2022★ 1 cited

A CMOL-Like Memristor-CMOS Neuromorphic Chip-Core Demonstrating Stochastic Binary STDP

L. A. Camuñas-Mesa, E. Vianello, C. Reita +2

The advent of nanoscale memristors raised hopes of being able to build CMOL (CMOS/nanowire/moLecular) type ultra-dense in-memory-computing circuit architectures. In CMOL, nanoscale…

cs.ET2021

2022 Roadmap on Neuromorphic Computing and Engineering

Dennis V. Christensen, Regina Dittmann, Bernabé Linares-Barranco +56

Modern computation based on the von Neumann architecture is today a mature cutting-edge science. In the Von Neumann architecture, processing and memory units are implemented as sep…

cs.ET2021★ 1 cited

Experimental Body-input Three-stage DC offset Calibration Scheme for Memristive Crossbar

Charanraj Mohan, L. A. Camuñas-Mesa, Elisa Vianello +4

Reading several ReRAMs simultaneously in a neuromorphic circuit increases power consumption and limits scalability. Applying small inference read pulses is a vain attempt when offs…

cs.ET2021★ 4 cited

Implementation of binary stochastic STDP learning using chalcogenide-based memristive devices

C. Mohan, L. A. Camuñas-Mesa, J. M. de la Rosa +2

The emergence of nano-scale memristive devices encouraged many different research areas to exploit their use in multiple applications. One of the proposed applications was to imple…

cs.ET2020★ 70 cited

MemTorch: An Open-source Simulation Framework for Memristive Deep Learning Systems

Corey Lammie, Wei Xiang, Bernabé Linares-Barranco +1

Memristive devices have shown great promise to facilitate the acceleration and improve the power efficiency of Deep Learning (DL) systems. Crossbar architectures constructed using…

cs.ET2013★ 624 cited

Integration of nanoscale memristor synapses in neuromorphic computing architectures

Giacomo Indiveri, Bernabe Linares-Barranco, Robert Legenstein +2

Conventional neuro-computing architectures and artificial neural networks have often been developed with no or loose connections to neuroscience. As a consequence, they have largel…