2 papers
cs.AR2024
ML-based AIG Timing Prediction to Enhance Logic Optimization
Wenjing Jiang, Jin Yan, Sachin S. Sapatnekar
As circuit designs become more intricate, obtaining accurate performance estimation in early stages, for effective design space exploration, becomes more time-consuming. Traditiona…
cs.AR2024
IR-Aware ECO Timing Optimization Using Reinforcement Learning
Wenjing Jiang, Vidya A. Chhabria, Sachin S. Sapatnekar
Engineering change orders (ECOs) in late stages make minimal design fixes to recover from timing shifts due to excessive IR drops. This paper integrates IR-drop-aware timing analys…