2 papers
cs.AR2024
RapidStream IR: Infrastructure for FPGA High-Level Physical Synthesis
Jason Lau, Yuanlong Xiao, Yutong Xie +7
The increasing complexity of large-scale FPGA accelerators poses significant challenges in achieving high performance while maintaining design productivity. High-level synthesis (H…
cs.DC2021
Meta-level issues in Offloading: Scoping, Composition, Development, and their Automation
André DeHon, Hans Giesen, Nik Sultana +1
This paper argues for an accelerator development toolchain that takes into account the whole system containing the accelerator. With whole-system visibility, the toolchain can bett…