2 papers
cs.AR2021
BEANNA: A Binary-Enabled Architecture for Neural Network Acceleration
Caleb Terrill, Fred Chu
Modern hardware design trends have shifted towards specialized hardware acceleration for computationally intensive tasks like machine learning and computer vision. While these comp…
eess.SP2021
FPGA Implementations of Layered MinSum LDPC Decoders Using RCQ Message Passing
Caleb Terrill, Linfang Wang, Sean Chen +4
Non-uniform message quantization techniques such as reconstruction-computation-quantization (RCQ) improve error-correction performance and decrease hardware complexity of low-densi…