1 citations · 1 across the 4 of their papers we have counts for
4 papers
3D-Integrated Superconducting qubits: CMOS-Compatible, Wafer-Scale Processing for Flip-Chip Architectures
T. Mayer, H. Bender, S. J. K. Lang +16
In this article, we present a technology development of a superconducting qubit device 3D-integrated by flip-chip-bonding and processed following CMOS fabrication standards and con…
CMOS-Compatible, Wafer-Scale Processed Superconducting Qubits Exceeding Energy Relaxation Times of 200us
T. Mayer, J. Weber, E. Music +12
We present the results of an industry-grade fabrication of superconducting qubits on 200 mm wafers utilizing CMOS-established processing methods. By automated waferprober resistanc…
Wafer-Scale Characterization of Al/AlxOy/Al Josephson Junctions at Room Temperature
Simon J. K. Lang, Ignaz Eisele, Johannes Weber +13
Josephson junctions (JJs) are the key element of many devices operating at cryogenic temperatures. Development of time-efficient wafer-scale JJ characterization for process optimiz…
Controlling 4f antiferromagnetic dynamics via itinerant electronic susceptibility
Sang-Eun Lee, Yoav William Windsor, Daniela Zahn +10
Optical manipulation of magnetism holds promise for future ultrafast spintronics, especially with lanthanides and their huge, localized 4f magnetic moments. These moments interact…