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researcher

Mark Tehranipoor

3 papers here

Matching runs newest-first, so older work may not be attached to this profile yet.

author position
  • middle author1
  • last author1

Across the 2 of 3 papers where every author was matched, so the position is known.

fields
  • cs.AR1
  • cs.CR1
  • eess.IV1
ORCID 0000-0003-4699-3231
same name
  • Mark Tehranipoor — 1 paper

Either other researchers who publish under this name, or the same person where the external sources have not merged their records.

identity via Semantic Scholar / OpenAlex

collaborators

3 papers

cs.AR2025

DeepV: A Model-Agnostic Retrieval-Augmented Framework for Verilog Code Generation with a High-Quality Knowledge Base

Zahin Ibnat, Paul E. Calzada, Rasin Mohammed Ihtemam +4

As large language models (LLMs) continue to be integrated into modern technology, there has been an increased push towards code generation applications, which also naturally extend…

cs.CR2025

SV-LLM: An Agentic Approach for SoC Security Verification using Large Language Models

Dipayan Saha, Shams Tarek, Hasan Al Shaikh +8

Ensuring the security of complex system-on-chips (SoCs) designs is a critical imperative, yet traditional verification techniques struggle to keep pace due to significant challenge…

eess.IV2023

Framework for Automatic PCB Marking Detection and Recognition for Hardware Assurance

Olivia P. Dizon-Paradis, Daniel E. Capecci, Nathan T. Jessurun +3

A Bill of Materials (BoM) is a list of all components on a printed circuit board (PCB). Since BoMs are useful for hardware assurance, automatic BoM extraction (AutoBoM) is of great…

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