3 papers
cs.CR2018
ForASec: Formal Analysis of Security Vulnerabilities in Sequential Circuits
Faiq Khalid, Imran Hafeez Abbassi, Semeen Rehman +3
Security vulnerability analysis of Integrated Circuits using conventional design-time validation and verification techniques (like simulations, emulations, etc.) is generally a com…
cs.CR2018
TrojanZero: Switching Activity-Aware Design of Undetectable Hardware Trojans with Zero Power and Area Footprint
Imran Hafeez Abbassi, Faiq Khalid, Semeen Rehman +4
Conventional Hardware Trojan (HT) detection techniques are based on the validation of integrated circuits to determine changes in their functionality, and on non-invasive side-chan…
cs.AR2018
Accelerating Viterbi Algorithm using Custom Instruction Approach
Waqar Ahmad, Imran Hafeez Abbassi, Usman Sanwal +1
In recent years, the decoding algorithms in communication networks are becoming increasingly complex aiming to achieve high reliability in correctly decoding received messages. The…