222 citations · 768 across the 21 of their papers we have counts for
12 papers · 1 filter
Hardware Abstractions and Hardware Mechanisms to Support Multi-Task Execution on Coarse-Grained Reconfigurable Arrays
Taeyoung Kong, Kalhan Koul, Priyanka Raina +2
Domain-specific accelerators are used in various computing systems ranging from edge devices to data centers. Coarse-grained reconfigurable arrays (CGRAs) represent an architectura…
Canal: A Flexible Interconnect Generator for Coarse-Grained Reconfigurable Arrays
Jackson Melchert, Keyi Zhang, Yuchen Mei +3
The architecture of a coarse-grained reconfigurable array (CGRA) interconnect has a significant effect on not only the flexibility of the resulting accelerator, but also its power,…
Cascade: An Application Pipelining Toolkit for Coarse-Grained Reconfigurable Arrays
Jackson Melchert, Yuchen Mei, Kalhan Koul +3
While coarse-grained reconfigurable arrays (CGRAs) have emerged as promising programmable accelerator architectures, pipelining applications running on CGRAs is required to ensure…
The Sparse Abstract Machine
Olivia Hsu, Maxwell Strange, Ritvik Sharma +5
We propose the Sparse Abstract Machine (SAM), an abstract machine model for targeting sparse tensor algebra to reconfigurable and fixed-function spatial dataflow accelerators. SAM…
Bringing Source-Level Debugging Frameworks to Hardware Generators
Keyi Zhang, Zain Asgar, Mark Horowitz
High-level hardware generators have significantly increased the productivity of design engineers. They use software engineering constructs to reduce the repetition required to expr…
Enabling Reusable Physical Design Flows with Modular Flow Generators
Alex Carsello, James Thomas, Ankita Nayak +4
Achieving high code reuse in physical design flows is challenging but increasingly necessary to build complex systems. Unfortunately, existing approaches based on parameterized Tcl…