activity
19982022
most citedThe Tiny Tera: A Packet Switch Core

153 citations · 226 across the 10 of their papers we have counts for

collaborators

10 papers

cs.NI2022

Enabling the Reflex Plane with the nanoPU

Stephen Ibanez, Alex Mallery, Serhat Arslan +4

Many recent papers have demonstrated fast in-network computation using programmable switches, running many orders of magnitude faster than CPUs. The main limitation of writing soft…

cs.DC2022★ 2 cited

From Sand to Flour: The Next Leap in Granular Computing with NanoSort

Theo Jepsen, Stephen Ibanez, Gregory Valiant +1

The granularity of distributed computing is limited by communication time: there is no point in farming out smaller and smaller tasks if the communication overhead dominates the de…

cs.NI2021

Unbiased Experiments in Congested Networks

Bruce Spang, Veronica Hannan, Shravya Kunamalla +3

When developing a new networking algorithm, it is established practice to run a randomized experiment, or A/B test, to evaluate its performance. In an A/B test, traffic is randomly…

cs.NI2021

Updating the Theory of Buffer Sizing

Bruce Spang, Serhat Arslan, Nick McKeown

Routers have packet buffers to reduce packet drops during times of congestion. It is important to correctly size the buffer: make it too small, and packets are dropped unnecessaril…

cs.AR2020★ 8 cited

The nanoPU: Redesigning the CPU-Network Interface to Minimize RPC Tail Latency

Stephen Ibanez, Alex Mallery, Serhat Arslan +4

The nanoPU is a new networking-optimized CPU designed to minimize tail latency for RPCs. By bypassing the cache and memory hierarchy, the nanoPU directly places arriving messages i…

cs.NI2016★ 3 cited

Programmable Packet Scheduling

Anirudh Sivaraman, Suvinay Subramanian, Anurag Agrawal +7

Switches today provide a small set of scheduling algorithms. While we can tweak scheduling parameters, we cannot modify algorithmic logic, or add a completely new algorithm, after…