activity
20172026
most citedPerformance Implications of NoCs on 3D-Stacked Memories: Insights from the Hybrid Memory Cube

21 citations · 36 across the 9 of their papers we have counts for

collaborators

11 papers

cs.AR2026

Accelerating the Mitigation of LLM Inference Nondeterminism Across GPU Architectures

Liam Cooper, Shinnung Jeong, Hyeran Jeon +2

Large language model (LLM) outputs are expected to be reproducible under greedy decoding, yet in practice the same model, prompt, and software stack produce different outputs on di…

quant-ph2023★ 2 cited

Enabling Multi-threading in Heterogeneous Quantum-Classical Programming Models

Akihiro Hayashi, Austin Adams, Jeffrey Young +4

In this paper, we address some of the key limitations to realizing a generic heterogeneous parallel programming model for quantum-classical heterogeneous platforms. We discuss our…

cs.DC2022★ 8 cited

Application Experiences on a GPU-Accelerated Arm-based HPC Testbed

Wael Elwasif, William Godoy, Nick Hagerty +28

This paper assesses and reports the experience of ten teams working to port,validate, and benchmark several High Performance Computing applications on a novel GPU-accelerated Arm t…

cs.DC2022★ 1 cited

CuPBoP: CUDA for Parallelized and Broad-range Processors

Ruobing Han, Jun Chen, Bhanu Garg +3

CUDA is one of the most popular choices for GPU programming, but it can only be executed on NVIDIA GPUs. Executing CUDA on non-NVIDIA devices not only benefits the hardware communi…

cs.DC2022

"Smarter" NICs for faster molecular dynamics: a case study

Sara Karamati, Clayton Hughes, K. Scott Hemmert +6

This work evaluates the benefits of using a "smart" network interface card (SmartNIC) as a compute accelerator for the example of the MiniMD molecular dynamics proxy application. T…

cs.AR2020

Online Model Swapping in Architectural Simulation

Patrick Lavin, Jeffrey Young, Rich Vuduc +1

As systems and applications grow more complex, detailed simulation takes an ever increasing amount of time. The prospect of increased simulation time resulting in slower design ite…

cs.DC2018

Programming Strategies for Irregular Algorithms on the Emu Chick

Eric Hein, Srinivas Eswar, Abdurrahman Yaşar +7

The Emu Chick prototype implements migratory memory-side processing in a novel hardware system. Rather than transferring large amounts of data across the system interconnect, the E…

cs.PF2018★ 1 cited

Spatter: A Tool for Evaluating Gather / Scatter Performance

Patrick Lavin, Jeffrey Young, Jason Riedy +3

This paper describes a new benchmark tool, Spatter, for assessing memory system architectures in the context of a specific category of indexed accesses known as gather and scatter.…

cs.DC2018★ 3 cited

A Microbenchmark Characterization of the Emu Chick

Jeffrey S. Young, Eric Hein, Srinivas Eswar +5

The Emu Chick is a prototype system designed around the concept of migratory memory-side processing. Rather than transferring large amounts of data across power-hungry, high-latenc…

cs.AR2018

Wrangling Rogues: Managing Experimental Post-Moore Architectures

Will Powell, Jason Riedy, Jeffrey S. Young +1

The Rogues Gallery is a new experimental testbed that is focused on tackling "rogue" architectures for the Post-Moore era of computing. While some of these devices have roots in th…

cs.AR2017★ 21 cited

Performance Implications of NoCs on 3D-Stacked Memories: Insights from the Hybrid Memory Cube

Ramyad Hadidi, Bahar Asgari, Jeffrey Young +4

Memories that exploit three-dimensional (3D)-stacking technology, which integrate memory and logic dies in a single stack, are becoming popular. These memories, such as Hybrid Memo…