6 papers
HermiCache: Enclave-Aware Cache Replacement for Trusted Execution Environments
Oussama Elmnaouri, Pascal Cotret, Vianney Lapôtre +1
Trusted Execution Environments (TEEs) protect enclave memory from untrusted software but remain vulnerable to cache-based side-channel attacks due to shared microarchitectural reso…
Fault Injection in On-Chip Interconnects: A Comparative Study of Wishbone, AXI-Lite, and AXI
Hongwei Zhao, Vianney Lapotre, Guy Gogniat
Fault injection attacks exploit physical disturbances to compromise the functionality and security of integrated circuits. As System on Chip (SoC) architectures grow in complexity,…
On The Effect of Replacement Policies on The Security of Randomized Cache Architectures
Moritz Peters, Nicolas Gaudin, Jan Philipp Thoma +4
Randomizing the mapping of addresses to cache entries has proven to be an effective technique for hardening caches against contention-based attacks like Prime+Prome. While attacks…
A novel lightweight hardware-assisted static instrumentation approach for ARM SoC using debug components
Muhammad Abdul Wahab, Pascal Cotret, Mounir Nasr Allah +4
Most of hardware-assisted solutions for software security, program monitoring, and event-checking approaches require instrumentation of the target software, an operation which can…
A small and adaptive coprocessor for information flow tracking in ARM SoCs
Muhammad Abdul Wahab, Pascal Cotret, Mounir Nasr Allah +4
DIFT (Dynamic Information Flow Tracking) has been a hot topic for more than a decade. Unfortunately, existing hardware DIFT approaches have not been widely used neither by research…
Towards a hardware-assisted information flow tracking ecosystem for ARM processors
Muhammad Abdul Wahab, Pascal Cotret, Mounir Nasr Allah +3
This work details a hardware-assisted approach for information flow tracking implemented on reconfigurable chips. Current solutions are either time-consuming or hardly portable (mo…