activity
20182024
most citedA 64-core mixed-signal in-memory compute chip based on phase-change memory for deep neural network inference

294 citations · 414 across the 9 of their papers we have counts for

collaborators

11 papers

cs.ET2024★ 11 cited

The Inherent Adversarial Robustness of Analog In-Memory Computing

Corey Lammie, Julian Büchel, Athanasios Vasilopoulos +2

A key challenge for Deep Neural Network (DNN) algorithms is their vulnerability to adversarial attacks. Inherently non-deterministic compute substrates, such as those based on Anal…

cs.LG2024

Kernel Approximation using Analog In-Memory Computing

Julian Büchel, Giacomo Camposampiero, Athanasios Vasilopoulos +4

Kernel functions are vital ingredients of several machine learning algorithms, but often incur significant memory and computational costs. We introduce an approach to kernel approx…

eess.AS2024★ 8 cited

In-Materia Speech Recognition

Mohamadreza Zolfagharinejad, Julian Büchel, Lorenzo Cassola +4

With the rise of decentralized computing, as in the Internet of Things, autonomous driving, and personalized healthcare, it is increasingly important to process time-dependent sign…

cs.ET2024★ 9 cited

Improving the Accuracy of Analog-Based In-Memory Computing Accelerators Post-Training

Corey Lammie, Athanasios Vasilopoulos, Julian Büchel +4

Analog-Based In-Memory Computing (AIMC) inference accelerators can be used to efficiently execute Deep Neural Network (DNN) inference workloads. However, to mitigate accuracy losse…

cs.ET2023★ 66 cited

Using the IBM Analog In-Memory Hardware Acceleration Kit for Neural Network Training and Inference

Manuel Le Gallo, Corey Lammie, Julian Buechel +8

Analog In-Memory Computing (AIMC) is a promising approach to reduce the latency and energy consumption of Deep Neural Network (DNN) inference and training. However, the noisy and n…

cs.AR2023★ 18 cited

Gradient descent-based programming of analog in-memory computing cores

Julian Büchel, Athanasios Vasilopoulos, Benedikt Kersting +11

The precise programming of crossbar arrays of unit-cells is crucial for obtaining high matrix-vector-multiplication (MVM) accuracy in analog in-memory computing (AIMC) cores. We pr…

cs.ET2022★ 294 cited

A 64-core mixed-signal in-memory compute chip based on phase-change memory for deep neural network inference

Manuel Le Gallo, Riduan Khaddam-Aljameh, Milos Stanisavljevic +26

The need to repeatedly shuttle around synaptic weight values from memory to processing units has been a key source of energy inefficiency associated with hardware implementation of…

cs.CV2021

Adversarial Attacks on Spiking Convolutional Neural Networks for Event-based Vision

Julian Büchel, Gregor Lenz, Yalun Hu +2

Event-based dynamic vision sensors provide very sparse output in the form of spikes, which makes them suitable for low-power applications. Convolutional spiking neural networks mod…

cs.LG2021★ 3 cited

Network insensitivity to parameter noise via adversarial regularization

Julian Büchel, Fynn Faber, Dylan R. Muir

Neuromorphic neural network processors, in the form of compute-in-memory crossbar arrays of memristors, or in the form of subthreshold analog and mixed-signal ASICs, promise enormo…

cs.LG2021★ 5 cited

Supervised training of spiking neural networks for robust deployment on mixed-signal neuromorphic processors

Julian Büchel, Dmitrii Zendrikov, Sergio Solinas +2

Mixed-signal analog/digital circuits emulate spiking neurons and synapses with extremely high energy efficiency, an approach known as "neuromorphic engineering". However, analog ci…

cs.CV2018

Ladder Networks for Semi-Supervised Hyperspectral Image Classification

Julian Büchel, Okan Ersoy

We used the Ladder Network [Rasmus et al. (2015)] to perform Hyperspectral Image Classification in a semi-supervised setting. The Ladder Network distinguishes itself from other sem…