2 papers
cs.AR2020
When HLS Meets FPGA HBM: Benchmarking and Bandwidth Optimization
Young-kyu Choi, Yuze Chi, Jie Wang +2
With the recent release of High Bandwidth Memory (HBM) based FPGA boards, developers can now exploit unprecedented external memory bandwidth. This allows more memory-bounded applic…
cs.AR2018
Rapid Cycle-Accurate Simulator for High-Level Synthesis
Yuze Chi, Young-kyu Choi, Jason Cong +1
A large semantic gap between the high-level synthesis (HLS) design and the low-level (on-board or RTL) simulation environment often creates a barrier for those who are not FPGA exp…