4 papers
LLM-based Hardware Development with Hierarchical IRs and End-to-End Multi-Agent Workflow
Chenyang Yin, Agasthi Haputhanthri, Aditya Anirudh Jonnalagadda +7
Large language models (LLMs) are increasingly used in software development, but their use in complex hardware design remains limited. This gap stems from both the scarcity of publi…
Effective Pre-Silicon Verification of Processor Cores by Breaking the Bounds of Symbolic Quick Error Detection
Karthik Ganesan, Florian Lonsing, Srinivasa Shashank Nuthakki +6
We present a novel approach to pre-silicon verification of processor designs. The purpose of pre-silicon verification is to find logic bugs in a design at an early stage and thus a…
Symbolic QED Pre-silicon Verification for Automotive Microcontroller Cores: Industrial Case Study
Eshan Singh, Keerthikumara Devarajegowda, Sebastian Simon +8
We present an industrial case study that demonstrates the practicality and effectiveness of Symbolic Quick Error Detection (Symbolic QED) in detecting logic design flaws (logic bug…
Processor Hardware Security Vulnerabilities and their Detection by Unique Program Execution Checking
Mohammad Rahmani Fadiheh, Dominik Stoffel, Clark Barrett +2
Recent discovery of security attacks in advanced processors, known as Spectre and Meltdown, has resulted in high public alertness about security of hardware. The root cause of thes…