34 citations · 41 across the 6 of their papers we have counts for
6 papers
The SpiNNaker2 chip: a many-core platform for flexible and scalable brain-inspired computing
Stefan Scholze, Johannes Partzsch, Sebastian Höppner +27
In deep learning, efficiency gets more and more important to compensate for the ongoing growth in model sizes and applications. Neuromorphic hardware has long been advocated as an…
The SpiNNaker 2 Processing Element Architecture for Hybrid Digital Neuromorphic Computing
Sebastian Höppner, Yexin Yan, Andreas Dixius +15
This paper introduces the processing element architecture of the second generation SpiNNaker chip, implemented in 22nm FDSOI. On circuit level, the chip features adaptive body bias…
Dynamic Power Management for Neuromorphic Many-Core Systems
Sebastian Hoeppner, Bernhard Vogginger, Yexin Yan +12
This work presents a dynamic power management architecture for neuromorphic many core systems such as SpiNNaker. A fast dynamic voltage and frequency scaling (DVFS) technique is pr…
HAPPY: Hybrid Address-based Page Policy in DRAMs
Mohsen Ghasempour, Aamer Jaleel, Jim Garside +1
Memory controllers have used static page closure policies to decide whether a row should be left open, open-page policy, or closed immediately, close-page policy, after the row has…
DReAM: Dynamic Re-arrangement of Address Mapping to Improve the Performance of DRAMs
Mohsen Ghasempour, Jim Garside, Aamer Jaleel +1
The initial location of data in DRAMs is determined and controlled by the 'address-mapping' and even modern memory controllers use a fixed and run-time-agnostic address mapping. On…
Project Beehive: A Hardware/Software Co-designed Stack for Runtime and Architectural Research
Christos Kotselidis, Andrey Rodchenko, Colin Barrett +14
The end of Dennard scaling combined with stagnation in architectural and compiler optimizations makes it challenging to achieve significant performance deltas. Solutions based sole…