13 citations · 16 across the 6 of their papers we have counts for
8 papers
SparseConflicts: Handling Conflicting Data Layouts in Sparse Tensor Contractions
Adhitha Dias, Kirshanthan Sundararajah, Artem Pelenitsyn +1
Optimizing sparse tensor computations is challenging due to the use of compressed storage formats, which leads to non-affine loop nests and a vast, complex schedule space. The perf…
TENSURE: Fuzzing Sparse Tensor Compilers (Registered Report)
Kabilan Mahathevan, Yining Zhang, Muhammad Ali Gulzar +1
Sparse Tensor Compilers (STCs) have emerged as critical infrastructure for optimizing high-dimensional data analytics and machine learning workloads. The STCs must synthesize compl…
SparseAuto: An Auto-Scheduler for Sparse Tensor Computations Using Recursive Loop Nest Restructuring
Adhitha Dias, Logan Anderson, Kirshanthan Sundararajah +2
Automated code generation and performance enhancements for sparse tensor algebra have become essential in many real-world applications, such as quantum computing, physical simulati…
Taming the Hydra: Targeted Control-Flow Transformations for Dynamic Symbolic Execution
Charitha Saumya, Muhammad Hassan, Rohan Gangaraju +2
Dynamic Symbolic Execution (DSE) suffers from the path explosion problem when the target program has many conditional branches. The classical approach for managing the path explosi…
SparseLNR: Accelerating Sparse Tensor Computations Using Loop Nest Restructuring
Adhitha Dias, Kirshanthan Sundararajah, Charitha Saumya +1
Sparse tensor algebra computations have become important in many real-world applications like machine learning, scientific simulations, and data mining. Hence, automated code gener…
DARM: Control-Flow Melding for SIMT Thread Divergence Reduction -- Extended Version
Charitha Saumya, Kirshanthan Sundararajah, Milind Kulkarni
GPGPUs use the Single-Instruction-Multiple-Thread (SIMT) execution model where a group of threads-wavefront or warp-execute instructions in lockstep. When threads in a group encoun…