5 citations · 8 across the 9 of their papers we have counts for
9 papers
Real-time Digital RF Emulation -- II: A Near Memory Custom Accelerator
Mandovi Mukherjee, Xiangyu Mao, Nael Rahman +16
A near memory hardware accelerator, based on a novel direct path computational model, for real-time emulation of radio frequency systems is demonstrated. Our evaluation of hardware…
Real-time Digital RF Emulation -- I: The Direct Path Computational Model
Coleman DeLude, Joe Driscoll, Mandovi Mukherjee +11
In this paper we consider the problem of developing a computational model for emulating an RF channel. The motivation for this is that an accurate and scalable emulator has the pot…
Combined Static Analysis and Machine Learning Prediction for Application Debloating
Chris Porter, Sharjeel Khan, Kangqi Ni +1
Software debloating can effectively thwart certain code reuse attacks by reducing attack surfaces to break gadget chains. Approaches based on static analysis enable a reduced set o…
Practical compilation of fexprs using partial evaluation: Fexprs can performantly replace macros in purely-functional Lisp
Nathan Braswell, Sharjeel Khan, Santosh Pande
Macros are a common part of Lisp languages, and one of their most lauded features. Much research has gone into making macros both safer and more powerful resulting in developments…
On-the-fly Code Activation for Attack Surface Reduction
Chris Porter, Sharjeel Khan, Santosh Pande
Modern code reuse attacks are taking full advantage of bloated software. Attackers piece together short sequences of instructions in otherwise benign code to carry out malicious ac…
Compiler-Guided Throughput Scheduling for Many-core Machines
Girish Mururu, Sharjeel Khan, Bodhisatwa Chatterjee +4
Typical schedulers in multi-tenancy environments make use of reactive, feedback-oriented mechanisms based on performance counters to avoid resource contention but suffer from detec…
Effective Cache Apportioning for Performance Isolation Under Compiler Guidance
Bodhisatwa Chatterjee, Sharjeel Khan, Santosh Pande
With a growing number of cores in modern high-performance servers, effective sharing of the last level cache (LLC) is more critical than ever. The primary agenda of such systems is…
A Compiler Assisted Scheduler for Detecting and Mitigating Cache-Based Side Channel Attacks
Sharjeel Khan, Girish Mururu, Santosh Pande
Side channel attacks steal secret keys by cleverly leveraging information leakages and can, therefore, break encryption. Thus, detection and mitigation of side channel attacks is a…
Formalization of Automated Trading Systems in a Concurrent Linear Framework
Iliano Cervesato, Sharjeel Khan, Giselle Reis +1
We present a declarative and modular specification of an automated trading system (ATS) in the concurrent linear framework CLF. We implemented it in Celf, a CLF type checker which…