3 citations · 5 across the 2 of their papers we have counts for
5 papers
FIRESTARTER 2: Dynamic Code Generation for Processor Stress Tests
Robert Schöne, Markus Schmidl, Mario Bielert +1
Processor stress tests target to maximize processor power consumption by executing highly demanding workloads. They are typically used to test the cooling and electrical infrastruc…
Energy Efficiency Aspects of the AMD Zen 2 Architecture
Robert Schöne, Thomas Ilsche, Mario Bielert +3
In High Performance Computing, systems are evaluated based on their computational throughput. However, performance in contemporary server processors is primarily limited by power a…
Mapping Matters: Application Process Mapping on 3-D Processor Topologies
Jonas H. Müller Korndörfer, Mario Bielert, Laércio L. Pilla +1
Applications' performance is influenced by the mapping of processes to computing nodes, the frequency and volume of exchanges among processing elements, the network capacity, and t…
Q-Learning Inspired Self-Tuning for Energy Efficiency in HPC
Andreas Gocht, Robert Schöne, Mario Bielert
System self-tuning is a crucial task to lower the energy consumption of computers. Traditional approaches decrease the processor frequency in idle or synchronisation periods. Howev…
Energy Efficiency Features of the Intel Skylake-SP Processor and Their Impact on Performance
Robert Schöne, Thomas Ilsche, Mario Bielert +2
The overwhelming majority of High Performance Computing (HPC) systems and server infrastructure uses Intel x86 processors. This makes an architectural analysis of these processors…