3 papers
cs.CR2025
FaRAccel: FPGA-Accelerated Defense Architecture for Efficient Bit-Flip Attack Resilience in Transformer Models
Najmeh Nazari, Banafsheh Saber Latibari, Elahe Hosseini +8
Forget and Rewire (FaR) methodology has demonstrated strong resilience against Bit-Flip Attacks (BFAs) on Transformer-based models by obfuscating critical parameters through dynami…
cs.AR2019
Pyramid: Machine Learning Framework to Estimate the Optimal Timing and Resource Usage of a High-Level Synthesis Design
Hosein Mohammadi Makrani, Farnoud Farahmand, Hossein Sayadi +6
The emergence of High-Level Synthesis (HLS) tools shifted the paradigm of hardware design by making the process of mapping high-level programming languages to hardware design such…
cs.DC2018
Storage and Memory Characterization of Data Intensive Workloads for Bare Metal Cloud
Hosein Mohammadi Makrani
As the cost-per-byte of storage systems dramatically decreases, SSDs are finding their ways in emerging cloud infrastructure. Similar trend is happening for main memory subsystem,…