2 citations · 4 across the 3 of their papers we have counts for
3 papers
On BTI Aging Rejuvenation in Memory Address Decoders
Cemil Cem Gursoy, Daniel Kraak, Foisal Ahmed +3
Memory designs require timing margins to compensate for aging and fabrication process variations. With technology downscaling, aging mechanisms became more apparent, and larger mar…
High-Level Combined Deterministic and Pseudoexhuastive Test Generation for RISC Processors
Adeboye Stephen Oyeniran, Raimund Ubar, Maksim Jenihhin +2
Recent safety standards set stringent requirements for the target fault coverage in embedded microprocessors, with the objective to guarantee robustness and functional safety of th…
Mixed-level identification of fault redundancy in microprocessors
Adeboye Stephen Oyeniran, Raimund Ubar, Maksim Jenihhin +2
A new high-level implementation independent functional fault model for control faults in microprocessors is introduced. The fault model is based on the instruction set, and is spec…