9 citations · 14 across the 4 of their papers we have counts for
5 papers
StruM: Structured Mixed Precision for Efficient Deep Learning Hardware Codesign
Michael Wu, Arnab Raha, Deepak A. Mathaikutty +3
In this paper, we propose StruM, a novel structured mixed-precision-based deep learning inference method, co-designed with its associated hardware accelerator (DPU), to address the…
Microscaling Data Formats for Deep Learning
Bita Darvish Rouhani, Ritchie Zhao, Ankit More +30
Narrow bit-width data formats are key to reducing the computational and storage costs of modern deep learning applications. This paper evaluates Microscaling (MX) data formats that…
eGPU: A 750 MHz Class Soft GPGPU for FPGA
Martin Langhammer, George Constantinides
This paper introduces the eGPU, a SIMT soft processor designed for FPGAs. Soft processors typically achieve modest operating frequencies, a fraction of the headline performance cla…
High Performance Scalable FPGA Accelerator for Deep Neural Networks
Sudarshan Srinivasan, Pradeep Janedula, Saurabh Dhoble +7
Low-precision is the first order knob for achieving higher Artificial Intelligence Operations (AI-TOPS). However the algorithmic space for sub-8-bit precision compute is diverse, w…
Tools and Techniques for Efficient High-Level System Design on FPGAs
Adrian J. Chung, Kathryn Cobden, Mark Jervis +2
In order for FPGAs to be successful outside traditional markets, tools which enable software programmers to achieve high levels of system performance while abstracting away the FPG…