1 citations · 1 across the 2 of their papers we have counts for
2 papers
cs.AR2021
vlang: Mapping Verilog Netlists to Modern Technologies
Nicholas V. Giamblanco, Andrew Schmidt
Portability of hardware designs between Programmable Logic Devices (PLD) can be accomplished through the use of device-agnostic hardware description languages (HDL) such as Verilog…
cs.CR2019★ 1 cited
Toward Efficient Evaluation of Logic Encryption Schemes: Models and Metrics
Yinghua Hu, Vivek V. Menon, Andrew Schmidt +3
Research in logic encryption over the last decade has resulted in various techniques to prevent different security threats such as Trojan insertion, intellectual property leakage,…