activity
20182021
most citedMemory Centric Characterization and Analysis of SPEC CPU2017 Suite

47 citations · 47 across the 4 of their papers we have counts for

collaborators

5 papers

cs.AR2021

HyGain: High Performance, Energy-Efficient Hybrid Gain Cell based Cache Hierarchy

Sarabjeet Singh, Neelam Surana, Pranjali Jain +2

In this paper, we propose a 'full-stack' solution to designing high capacity and low latency on-chip cache hierarchies by starting at the circuit level of the hardware design stack…

cs.AR2021

Zero Aware Configurable Data Encoding by Skipping Transfer for Error Resilient Applications

Chandan Kumar Jha, Shreyas Singh, Riddhi Thakker +2

In this paper, we propose Zero Aware Configurable Data Encoding by Skipping Transfer (ZAC-DEST), a data encoding scheme to reduce the energy consumption of DRAM channels, specifica…

cs.AR2021

Fixed-Posit: A Floating-Point Representation for Error-Resilient Applications

Varun Gohil, Sumit Walia, Joycee Mekie +1

Today, almost all computer systems use IEEE-754 floating point to represent real numbers. Recently, posit was proposed as an alternative to IEEE-754 floating point as it has better…

cs.PF201947 cited

Memory Centric Characterization and Analysis of SPEC CPU2017 Suite

Sarabjeet Singh, Manu Awasthi

In this paper we provide a comprehensive, memory-centric characterization of the SPEC CPU2017 benchmark suite, using a number of mechanisms including dynamic binary instrumentation…

cs.PF2018

I/O Workload Management for All-Flash Datacenter Storage Systems Based on Total Cost of Ownership

Zhengyu Yang, Manu Awasthi, Mrinmoy Ghosh +2

Recently, the capital expenditure of flash-based Solid State Driver (SSDs) keeps declining and the storage capacity of SSDs keeps increasing. As a result, all-flash storage systems…