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20182021
most citedReconfigurable co-processor architecture with limited numerical precision to accelerate deep convolutional neural networks

5 citations · 5 across the 2 of their papers we have counts for

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cs.AR2019

Scalable High Performance SDN Switch Architecture on FPGA for Core Networks

Sasindu Wijeratne, Ashen Ekanayake, Sandaruwan Jayaweera +2

Due to the increasing heterogeneity in network user requirements, dynamically varying day to day network traffic patterns and delay in-network service deployment, there is a huge d…