66 citations · 69 across the 10 of their papers we have counts for
7 papers · 1 filter
Hydra: Phase-Aware Workload Characterization of LLM Inference across Edge SoC Generations, Backends, and Quantization Levels
Amir Taherin, Sana Taghipour Anvari, Charles Amante +9
Edge LLM deployment is shaped by more than model size and precision: inference backend, hardware platform, memory traffic, and power management all affect latency and efficiency. W…
ELiTeFormer: An Efficient Transformer for FPGAs
Victor Agostinelli, Nicolas Bohm Agostini, Antonino Tumeo
Transformer blocks are prevalent in large language model (LLM) but present deployment challenges due to their challenging computational and memory demands. While prior work has typ…
Defeat the Heap: Zero-Copy Data Movement in AXI4MLIR
Elam Cohavi, Nicolas Bohm Agostini, Jude Haris +3
As custom hardware accelerators become increasingly central to machine learning workloads, efficient data transfer is critical for maximizing accelerator performance on linear alge…
PoTAcc: A Pipeline for End-to-End Acceleration of Power-of-Two Quantized DNNs
Rappy Saha, Jude Haris, Nicolas Bohm Agostini +2
Power-of-two (PoT) quantization significantly reduces the size of deep neural networks (DNNs) and replaces multiplications with bit-shift operations for inference. Prior work has s…
HEC: Equivalence Verification Checking for Code Transformation via Equality Saturation
Jiaqi Yin, Zhan Song, Nicolas Bohm Agostini +2
In modern computing systems, compilation employs numerous optimization techniques to enhance code performance. Source-to-source code transformations, which include control flow and…
NeuraChip: Accelerating GNN Computations with a Hash-based Decoupled Spatial Accelerator
Kaustubh Shivdikar, Nicolas Bohm Agostini, Malith Jayaweera +5
Graph Neural Networks (GNNs) are emerging as a formidable tool for processing non-euclidean data across various domains, ranging from social network analysis to bioinformatics. Des…
SECDA: Efficient Hardware/Software Co-Design of FPGA-based DNN Accelerators for Edge Inference
Jude Haris, Perry Gibson, José Cano +2
Edge computing devices inherently face tight resource constraints, which is especially apparent when deploying Deep Neural Networks (DNN) with high memory and compute demands. FPGA…