32 citations · 37 across the 2 of their papers we have counts for
3 papers
cs.AR2019★ 32 cited
An efficient floating point multiplier design for high speed applications using Karatsuba algorithm and Urdhva-Tiryagbhyam algorithm
S Arish, R. K. Sharma
Floating point multiplication is a crucial operation in high power computing applications such as image processing, signal processing etc. And also multiplication is the most time…
cs.AR2019★ 5 cited
Run-Time-Reconfigurable Multi-Precision Floating-Point Matrix Multiplier Intellectual Property Core on FPGA
Arish S, R. K. Sharma
In todays world, high-power computing applications such as image processing, digital signal processing, graphics, and robotics require enormous computing power. These applications…
cs.AR2019
Run-time reconfigurable multi-precision floating point multiplier design for high speed, low-power applications
S. Arish, R. K. Sharma
Floating point multiplication is one of the crucial operations in many application domains such as image processing, signal processing etc. But every application requires different…