50 citations · 120 across the 20 of their papers we have counts for
21 papers
JASPER: Special Session on Joint Reliability And Security Assessment of SPlit Computing for Edge Robustness
Enrico Magliano, Giuseppe Esposito, Amir Hossein Shahdadian +13
Split Computing (SC) enables efficient deployment of Deep Neural Networks (DNNs) by partitioning inference between edge devices and cloud servers. However, intermediate feature rep…
Spiker-LL: An Energy-Efficient FPGA Accelerator Enabling Adaptive Local Learning in Spiking Neural Networks
Alessio Caviglia, Filippo Marostica, Alessandro Savino +1
Deploying adaptive intelligence at the edge remains challenging due to the high computational and energy cost of training neural models. Spiking Neural Networks (SNNs) offer a prom…
Power Side-Channel Analysis of the CVA6 RISC-V Core at the RTL Level Using VeriSide
Behnam Farnaghinejad, Antonio Porsia, Annachiara Ruospo +3
Security in modern RISC-V processors demands more than functional correctness: It requires resilience to side-channel attacks. This paper evaluates the vulnerability of the side ch…
CANDoSA: A Hardware Performance Counter-Based Intrusion Detection System for DoS Attacks on Automotive CAN bus
Franco Oberti, Stefano Di Carlo, Alessandro Savino
The Controller Area Network (CAN) protocol, essential for automotive embedded systems, lacks inherent security features, making it vulnerable to cyber threats, especially with the…
SFATTI: Spiking FPGA Accelerator for Temporal Task-driven Inference -- A Case Study on MNIST
Alessio Caviglia, Filippo Marostica, Alessio Carpegna +2
Hardware accelerators are essential for achieving low-latency, energy-efficient inference in edge applications like image recognition. Spiking Neural Networks (SNNs) are particular…
Security and RAS in the Computing Continuum
Martí Alonso, David Andreu, Ramon Canal +10
Security and RAS are two non-functional requirements under focus for current systems developed for the computing continuum. Due to the increased number of interconnected computer s…
Hardware-based stack buffer overflow attack detection on RISC-V architectures
Cristiano Pegoraro Chenet, Ziteng Zhang, Alessandro Savino +1
This work evaluates how well hardware-based approaches detect stack buffer overflow (SBO) attacks in RISC-V systems. We conducted simulations on the PULP platform and examined micr…
SpikingJET: Enhancing Fault Injection for Fully and Convolutional Spiking Neural Networks
Anil Bayram Gogebakan, Enrico Magliano, Alessio Carpegna +3
As artificial neural networks become increasingly integrated into safety-critical systems such as autonomous vehicles, devices for medical diagnosis, and industrial automation, ens…
A Micro Architectural Events Aware Real-Time Embedded System Fault Injector
Enrico Magliano, Alessio Carpegna, Alessadro Savino +1
In contemporary times, the increasing complexity of the system poses significant challenges to the reliability, trustworthiness, and security of the SACRES. Key issues include the…
Security layers and related services within the Horizon Europe NEUROPULS project
Fabio Pavanello, Cedric Marchand, Paul Jimenez +17
In the contemporary security landscape, the incorporation of photonics has emerged as a transformative force, unlocking a spectrum of possibilities to enhance the resilience and ef…
PSP Framework: A novel risk assessment method in compliance with ISO/SAE-21434
Franco Oberti, Ernesto Sanchez, Alessandro Savino +2
As more cars connect to the internet and other devices, the automotive market has become a lucrative target for cyberattacks. This has made the industry more vulnerable to security…
NEUROPULS: NEUROmorphic energy-efficient secure accelerators based on Phase change materials aUgmented siLicon photonicS
Fabio Pavanello, Cedric Marchand, Ian O'Connor +34
This special session paper introduces the Horizon Europe NEUROPULS project, which targets the development of secure and energy-efficient RISC-V interfaced neuromorphic accelerators…
Validation, Verification, and Testing (VVT) of future RISC-V powered cloud infrastructures: the Vitamin-V Horizon Europe Project perspective
Marti Alonso, David Andreu, Ramon Canal +10
Vitamin-V is a project funded under the Horizon Europe program for the period 2023-2025. The project aims to create a complete open-source software stack for RISC-V that can be use…
Special Session: Neuromorphic hardware design and reliability from traditional CMOS to emerging technologies
Fabio Pavanello, Elena Ioana Vatajelu, Alberto Bosio +6
The field of neuromorphic computing has been rapidly evolving in recent years, with an increasing focus on hardware design and reliability. This special session paper provides an o…
Fast Exploration of the Impact of Precision Reduction on Spiking Neural Networks
Sepide Saeedi, Alessio Carpegna, Alessandro Savino +1
Approximate Computing (AxC) techniques trade off the computation accuracy for performance, energy, and area reduction gains. The trade-off is particularly convenient when the appli…
Micro-Architectural features as soft-error induced fault executions markers in embedded safety-critical systems: a preliminary study
Deniz Kasap, Alessio Carpegna, Alessandro Savino +1
Radiation-induced soft errors are one of the most challenging issues in Safety Critical Real-Time Embedded System (SACRES) reliability, usually handled using different flavors of D…
LIN-MM: Multiplexed Message Authentication Code for Local Interconnect Network message authentication in road vehicles
Franco Oberti, Ernesto Sanchez, Alessandro Savino +3
The automotive market is profitable for cyberattacks with the constant shift toward interconnected vehicles. Electronic Control Units (ECUs) installed on cars often operate in a cr…
CAN-MM: Multiplexed Message Authentication Code for Controller Area Network message authentication in road vehicles
Franco Oberti, Ernesto Sanchez, Alessandro Savino +2
The automotive market is increasingly profitable for cyberattacks with the constant shift toward fully interconnected vehicles. Electronic Control Units (ECUs) installed on cars of…
Using analog scrambling circuits for automotive sensor integrity and authenticity
Cristiano Pegoraro Chenet, Alessandro Savino, Stefano di Carlo
The automotive domain rapidly increases the embedded amount of complex and interconnected electronics systems. A considerable proportion of them are real-time safety-critical devic…
Spiker: an FPGA-optimized Hardware acceleration for Spiking Neural Networks
Alessio Carpegna, Alessandro Savino, Stefano Di Carlo
Spiking Neural Networks (SNN) are an emerging type of biologically plausible and efficient Artificial Neural Network (ANN). This work presents the development of a hardware acceler…
Securing Soft IP Cores in FPGA based Reconfigurable Mobile Heterogeneous Systems
Alberto Carelli, Cataldo Basile, Alessandro Savino +2
The mobile application market is rapidly growing and changing, offering always brand new software to install in increasingly powerful devices. Mobile devices become pervasive and m…