37 citations · 58 across the 14 of their papers we have counts for
14 papers
TroLL: Exploiting Structural Similarities between Logic Locking and Hardware Trojans
Yuntao Liu, Aruna Jayasena, Prabhat Mishra +1
Logic locking and hardware Trojans are two fields in hardware security that have been mostly developed independently from each other. In this paper, we identify the relationship be…
Hardware Acceleration of Explainable Artificial Intelligence
Zhixin Pan, Prabhat Mishra
Machine learning (ML) is successful in achieving human-level artificial intelligence in various fields. However, it lacks the ability to explain an outcome due to its black-box nat…
Modeling and Exploration of Gain Competition Attacks in Optical Network-on-Chip Architectures
Khushboo Rani, Hansika Weerasena, Stephen A. Butler +2
Network-on-Chip (NoC) enables energy-efficient communication between numerous components in System-on-Chip architectures. The optical NoC is widely considered a key technology to o…
quAssert: Automatic Generation of Quantum Assertions
Hasini Witharana, Daniel Volya, Prabhat Mishra
Functional validation is necessary to detect any errors during quantum computation. There are promising avenues to debug quantum circuits using runtime assertions. However, the exi…
Sequence-Based Incremental Concolic Testing of RTL Models
Hasini Witharana, Aruna Jayasena, Prabhat Mishra
Concolic testing is a scalable solution for automated generation of directed tests for validation of hardware designs. Unfortunately, concolic testing also fails to cover complex c…
Lightweight Encryption and Anonymous Routing in NoC based SoCs
Subodha Charles, Prabhat Mishra
Advances in manufacturing technologies have enabled System-on-Chip (SoC) designers to integrate an increasing number of cores on a single SoC. Increasing SoC complexity coupled wit…
State Preparation on Quantum Computers via Quantum Steering
Daniel Volya, Prabhat Mishra
One of the major components for realizing quantum computers is the ability to initialize the computer to a known fiducial state, also known as state preparation. We demonstrate a s…
Design for Trust utilizing Rareness Reduction
Aruna Jayasena, Prabhat Mishra
Increasing design complexity and reduced time-to-market have motivated manufacturers to outsource some parts of the System-on-Chip (SoC) design flow to third-party vendors. This pr…
Security of Electrical, Optical and Wireless On-Chip Interconnects: A Survey
Hansika Weerasena, Prabhat Mishra
The advancement of manufacturing technologies has enabled the integration of more intellectual property (IP) cores on the same system-on-chip (SoC). Scalable and high throughput on…
Backdoor Attacks on Bayesian Neural Networks using Reverse Distribution
Zhixin Pan, Prabhat Mishra
Due to cost and time-to-market constraints, many industries outsource the training process of machine learning models (ML) to third-party cloud service providers, popularly known a…
Fast Approximate Spectral Normalization for Robust Deep Neural Networks
Zhixin Pan, Prabhat Mishra
Deep neural networks (DNNs) play an important role in machine learning due to its outstanding performance compared to other alternatives. However, DNNs are not suitable for safety-…
Hardware Acceleration of Explainable Machine Learning using Tensor Processing Units
Zhixin Pan, Prabhat Mishra
Machine learning (ML) is successful in achieving human-level performance in various fields. However, it lacks the ability to explain an outcome due to its black-box nature. While e…
Data Criticality in Multi-Threaded Applications: An Insight for Many-Core Systems
Abhijit Das, John Jose, Prabhat Mishra
Multi-threaded applications are capable of exploiting the full potential of many-core systems. However, Network-on-Chip (NoC) based inter-core communication in many-core systems is…
System-on-Chip Security Assertions
Yangdi Lyu, Prabhat Mishra
Assertions are widely used for functional validation as well as coverage analysis for both software and hardware designs. Assertions enable runtime error detection as well as faste…