activity
20202026
most citedAn Improved Quadrature Voltage-Controlled Oscillator with Through-Silicon-Via Inductor in Three-dimensional Integrated Circuits

2 citations · 2 across the 8 of their papers we have counts for

collaborators

9 papers

cs.SE2026

AgentDV: Closed-Loop Agentic AI for Hardware Design Verification

Navya Goli, Junzhe Liu, Zhenge Jia +1

Register-transfer level (RTL) verification consumes a major part of modern system-on-chip (SoC) development effort. Yet, recent LLM-based verification-code generation often fails t…

cs.CV2026

LLM-as-Judge Framework for Evaluating Tone-Induced Hallucination in Vision-Language Models

Zhiyuan Jiang, Weihao Hong, Xinlei Guan +8

Vision-Language Models (VLMs) are increasingly deployed in settings where reliable visual grounding carries operational consequences, yet their behavior under progressively coerciv…

cs.CV2026

Toward Accountable AI-Generated Content on Social Platforms: Steganographic Attribution and Multimodal Harm Detection

Xinlei Guan, David Arosemena, Tejaswi Dhandu +7

The rapid growth of generative AI has introduced new challenges in content moderation and digital forensics. In particular, benign AI-generated images can be paired with harmful or…

cs.ET2026

CQ-CiM: Hardware-Aware Embedding Shaping for Robust CiM-Based Retrieval

Xinzhao Li, Alptekin Vardar, Franz Müller +6

Deploying Retrieval-Augmented Generation (RAG) on edge devices is in high demand, but is hindered by the latency of massive data movement and computation on traditional architectur…

cs.SE2025

SysVCoder: An LLM-Driven Framework for Systematic Generation of System-Level Design

Jian Zuo, Junzhe Liu, Xianyong Wang +6

Recent advances in large language models (LLMs) have demonstrated strong potential in generating hardware designs using hardware description languages (HDLs) such as Verilog. Howev…

eess.SY2023

Efficient and Scalable MIV-transistor with Extended Gate in Monolithic 3D Integration

Madhava Sarma Vemuri, Umamaheswara Rao Tida

Monolithic 3D integration has become a promising solution for future computing needs. The metal inter-layer via (MIV) forms interconnects between substrate layers in Monolithic 3D…

eess.SY2023

FDSOI Process Based MIV-transistor Utilization for Standard Cell Designs in Monolithic 3D Integration

Madhava Sarma Vemuri, Umamaheswara Rao Tida

Monolithic Three-Dimensional Integrated Circuits (M3D-IC) has become an attractive option to increase the transistor density. In M3D-IC, substrate layers are realized on top of pre…

eess.SY2023

Metal Inter-layer Via Keep-out-zone in M3D IC: A Critical Process-aware Design Consideration

Madhava Sarma Vemuri, Umamaheswara Rao Tida

Metal inter-layer via (MIV) in Monolithic three-dimensional integrated circuits (M3D-IC) is used to connect inter-layer devices and provide power and clock signals across multiple…

eess.SY2020★ 2 cited

An Improved Quadrature Voltage-Controlled Oscillator with Through-Silicon-Via Inductor in Three-dimensional Integrated Circuits

Dawei Li, Madhava Sarma Vemuri, Umamaheswara Rao Tida

Low-power quadrature voltage-controlled oscillator (QVCO) design utilizing transformer-feedback and current-reuse techniques with increased frequency range is proposed in this pape…