35 citations · 56 across the 26 of their papers we have counts for
11 papers · 1 filter
Run, Ruminate, and Regulate: A Dual-process Thinking System for Vision-and-Language Navigation
Yu Zhong, Zihao Zhang, Rui Zhang +9
Vision-and-Language Navigation (VLN) requires an agent to dynamically explore complex 3D environments following human instructions. Recent research underscores the potential of har…
QiMeng-NeuComBack: Self-Evolving Translation from IR to Assembly Code
Hainan Fang, Yuanbo Wen, Jun Bi +8
Compilers, while essential, are notoriously complex systems that demand prohibitively expensive human expertise to develop and maintain. The recent advancements in Large Language M…
QiMeng-CRUX: Narrowing the Gap Between Natural Language and Verilog via Core Refined Understanding eXpression for Circuit Design
Lei Huang, Rui Zhang, Jiaming Guo +9
Large language models (LLMs) have shown promising capabilities in hardware description language (HDL) generation. However, existing approaches often rely on free-form natural langu…
QiMeng-SALV: Signal-Aware Learning for Verilog Code Generation
Yang Zhang, Rui Zhang, Jiaming Guo +10
The remarkable progress of Large Language Models (LLMs) presents promising opportunities for Verilog code generation which is significantly important for automated circuit design.…
Revisiting Entropy Regularization: Adaptive Coefficient Unlocks Its Potential for LLM Reinforcement Learning
Xiaoyun Zhang, Xiaojian Yuan, Di Huang +6
Reasoning ability has become a defining capability of Large Language Models (LLMs), with Reinforcement Learning with Verifiable Rewards (RLVR) emerging as a key paradigm to enhance…
StepFun-Formalizer: Unlocking the Autoformalization Potential of LLMs through Knowledge-Reasoning Fusion
Yutong Wu, Di Huang, Ruosi Wan +8
Autoformalization aims to translate natural-language mathematical statements into a formal language. While LLMs have accelerated progress in this area, existing methods still suffe…
RealBench: Benchmarking Verilog Generation Models with Real-World IP Designs
Pengwei Jin, Di Huang, Chongxiao Li +10
The automatic generation of Verilog code using Large Language Models (LLMs) has garnered significant interest in hardware design automation. However, existing benchmarks for evalua…
QiMeng: Fully Automated Hardware and Software Design for Processor Chip
Rui Zhang, Yuanbo Wen, Shuyao Cheng +17
Processor chip design technology serves as a key frontier driving breakthroughs in computer science and related fields. With the rapid advancement of information technology, conven…
QiMeng-CodeV-R1: Reasoning-Enhanced Verilog Generation
Yaoyu Zhu, Di Huang, Hanqi Lyu +16
Large language models (LLMs) trained via reinforcement learning with verifiable reward (RLVR) have achieved breakthroughs on tasks with explicit, automatable verification, such as…
MigGPT: Harnessing Large Language Models for Automated Migration of Out-of-Tree Linux Kernel Patches Across Versions
Pucheng Dang, Di Huang, Dong Li +4
Out-of-tree kernel patches are essential for adapting the Linux kernel to new hardware or enabling specific functionalities. Maintaining and updating these patches across different…
AGON: Automated Design Framework for Customizing Processors from ISA Documents
Chongxiao Li, Di Huang, Pengwei Jin +12
Customized processors are attractive solutions for vast domain-specific applications due to their high energy efficiency. However, designing a processor in traditional flows is tim…