activity
20192024
most citedUncertainty Modeling of Emerging Device-based Computing-in-Memory Neural Accelerators with Application to Neural Architecture Search

16 citations · 34 across the 6 of their papers we have counts for

collaborators

7 papers

cs.AR2022

On the Reliability of Computing-in-Memory Accelerators for Deep Neural Networks

Zheyu Yan, Xiaobo Sharon Hu, Yiyu Shi

Computing-in-memory with emerging non-volatile memory (nvCiM) is shown to be a promising candidate for accelerating deep neural networks (DNNs) with high energy efficiency. However…

cs.AR20224 cited

A Semi-Decoupled Approach to Fast and Optimal Hardware-Software Co-Design of Neural Accelerators

Bingqian Lu, Zheyu Yan, Yiyu Shi +1

In view of the performance limitations of fully-decoupled designs for neural architectures and accelerators, hardware-software co-design has been emerging to fully reap the benefit…

cs.LG20211 cited

RADARS: Memory Efficient Reinforcement Learning Aided Differentiable Neural Architecture Search

Zheyu Yan, Weiwen Jiang, Xiaobo Sharon Hu +1

Differentiable neural architecture search (DNAS) is known for its capacity in the automatic generation of superior neural networks. However, DNAS based methods suffer from memory u…

cs.AR202116 cited

Uncertainty Modeling of Emerging Device-based Computing-in-Memory Neural Accelerators with Application to Neural Architecture Search

Zheyu Yan, Da-Cheng Juan, Xiaobo Sharon Hu +1

Emerging device-based Computing-in-memory (CiM) has been proved to be a promising candidate for high-energy efficiency deep neural network (DNN) computations. However, most emergin…

cs.LG202012 cited

Co-Exploration of Neural Architectures and Heterogeneous ASIC Accelerator Designs Targeting Multiple Tasks

Lei Yang, Zheyu Yan, Meng Li +6

Neural Architecture Search (NAS) has demonstrated its power on various AI accelerating platforms such as Field Programmable Gate Arrays (FPGAs) and Graphic Processing Units (GPUs).…

cs.NE2019

Device-Circuit-Architecture Co-Exploration for Computing-in-Memory Neural Accelerators

Weiwen Jiang, Qiuwen Lou, Zheyu Yan +4

Co-exploration of neural architectures and hardware design is promising to simultaneously optimize network accuracy and hardware efficiency. However, state-of-the-art neural archit…