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cs.DC2021★ 7 cited
Xar-Trek: Run-time Execution Migration among FPGAs and Heterogeneous-ISA CPUs
Edson Horta, Ho-Ren Chuang, Naarayanan Rao VSathish +4
Datacenter servers are increasingly heterogeneous: from x86 host CPUs, to ARM or RISC-V CPUs in NICs/SSDs, to FPGAs. Previous works have demonstrated that migrating application exe…
cs.DC2021
Crystalline: Fast and Memory Efficient Wait-Free Reclamation
Ruslan Nikolaev, Binoy Ravindran
Historically, memory management based on lock-free reference counting was very inefficient, especially for read-dominated workloads. Thus, approaches such as epoch-based reclamatio…