activity
20202026
most citedPure Tensor Program Rewriting via Access Patterns (Representation Pearl)

26 citations · 33 across the 9 of their papers we have counts for

collaborators

9 papers

cs.SE2026

DUET: Agentic Design Understanding via Experimentation and Testing

Gus Henry Smith, Sandesh Adhikary, Vineet Thumuluri +5

AI agents powered by large language models (LLMs) are being used to solve increasingly complex software engineering challenges, but struggle with hardware design tasks. Register Tr…

cs.PL2024★ 1 cited

Scaling Program Synthesis Based Technology Mapping with Equality Saturation

Gus Henry Smith, Colin Knizek, Daniel Petrisko +5

State-of-the-art hardware compilers for FPGAs often fail to find efficient mappings of high-level designs to low-level primitives, especially complex programmable primitives like d…

cs.PL2024

Generation of Compiler Backends from Formal Models of Hardware

Gus Henry Smith

Compilers convert between representations -- usually, from higher-level, human writable code to lower-level, machine-readable code. A compiler backend is the portion of the compile…

cs.AR2024★ 2 cited

There and Back Again: A Netlist's Tale with Much Egraphin'

Gus Henry Smith, Zachary D. Sisco, Thanawat Techaumnuaiwit +6

EDA toolchains are notoriously unpredictable, incomplete, and error-prone; the generally-accepted remedy has been to re-imagine EDA tasks as compilation problems. However, any comp…

cs.AR2024★ 4 cited

FPGA Technology Mapping Using Sketch-Guided Program Synthesis

Gus Henry Smith, Ben Kushigian, Vishal Canumalla +6

FPGA technology mapping is the process of implementing a hardware design expressed in high-level HDL (hardware design language) code using the low-level, architecture-specific prim…

cs.PL2023

Generate Compilers from Hardware Models!

Gus Henry Smith, Ben Kushigian, Vishal Canumalla +3

Compiler backends should be automatically generated from hardware design language (HDL) models of the hardware they target. Generating compiler components directly from HDL can pro…

cs.AR2022

Application-Level Validation of Accelerator Designs Using a Formal Software/Hardware Interface

Bo-Yuan Huang, Steven Lyubomirsky, Yi Li +10

Ideally, accelerator development should be as easy as software development. Several recent design languages/tools are working toward this goal, but actually testing early designs o…

cs.PL2021★ 26 cited

Pure Tensor Program Rewriting via Access Patterns (Representation Pearl)

Gus Henry Smith, Andrew Liu, Steven Lyubomirsky +5

Tensor kernels in machine learning (ML) often correspond to pure mathematical expressions, making term rewriting an attractive strategy for optimization and mapping to specialized…

cs.DC2020

Enumerating Hardware-Software Splits with Program Rewriting

Gus Smith, Zachary Tatlock, Luis Ceze

A core problem in hardware-software codesign is in the sheer size of the design space. Without a set ISA to constrain the hardware-software interface, the design space explodes. Th…