activity
20142025
most citedMultiscale Co-Design Analysis of Energy, Latency, Area, and Accuracy of a ReRAM Analog Neural Training Accelerator

184 citations · 430 across the 19 of their papers we have counts for

collaborators

21 papers

cs.ET2025

A self-heating electrochemical cell with nine decades of programmable linear resistance

Adam L. Gross, Sangheon Oh, Minseong Park +22

A programmable linear resistor with a compact footprint would have profound implications for microelectronics, enabling efficient in-sensor analog signal processing and in-memory c…

cs.ET2024

Analog fast Fourier transforms for scalable and efficient signal processing

T. Patrick Xiao, Ben Feinberg, David K. Richardson +7

Edge devices are being deployed at increasing volumes to sense and act on information from the physical world. The discrete Fourier transform (DFT) is often necessary to make this…

cond-mat.mtrl-sci2023

Nanoscale imaging of He-ion irradiation effects on amorphous TaO toward electroforming-free neuromorphic functions

Olha Popova, Steven J. Randolph, Sabine M. Neumayer +7

Resistive switching in thin films has been widely studied in a broad range of materials. Yet the mechanisms behind electroresistive switching have been persistently difficult to de…

cond-mat.mes-hall2023

Parallel Matrix Multiplication Using Voltage Controlled Magnetic Anisotropy Domain Wall Logic

Nicholas Zogbi, Samuel Liu, Christopher H. Bennett +4

The domain wall-magnetic tunnel junction (DW-MTJ) is a versatile device that can simultaneously store data and perform computations. These three-terminal devices are promising for…

cond-mat.mtrl-sci2022

Tunable intervalence charge transfer in ruthenium Prussian blue analogue enables stable and efficient biocompatible artificial synapses

Donald A. Robinson, Michael E. Foster, Christopher H. Bennett +12

Emerging concepts for neuromorphic computing, bioelectronics, and brain-computer interfacing inspire new research avenues aimed at understanding the relationship between oxidation…

cs.AR2021★ 72 cited

On the Accuracy of Analog Neural Network Inference Accelerators

T. Patrick Xiao, Ben Feinberg, Christopher H. Bennett +5

Specialized accelerators have recently garnered attention as a method to reduce the power consumption of neural network inference. A promising category of accelerators utilizes non…

cs.NE2021

High-Speed CMOS-Free Purely Spintronic Asynchronous Recurrent Neural Network

Pranav O. Mathews, Christian B. Duffee, Abel Thayil +8

Neuromorphic computing systems overcome the limitations of traditional von Neumann computing architectures. These computing systems can be further improved upon by using emerging t…

cond-mat.mes-hall2021★ 19 cited

Controllable reset behavior in domain wall-magnetic tunnel junction artificial neurons for task-adaptable computation

Samuel Liu, Christopher H. Bennett, Joseph S. Friedman +3

Neuromorphic computing with spintronic devices has been of interest due to the limitations of CMOS-driven von Neumann computing. Domain wall-magnetic tunnel junction (DW-MTJ) devic…

cs.NE2020★ 1 cited

Domain Wall Leaky Integrate-and-Fire Neurons with Shape-Based Configurable Activation Functions

Wesley H. Brigner, Naimul Hassan, Xuan Hu +7

Complementary metal oxide semiconductor (CMOS) devices display volatile characteristics, and are not well suited for analog applications such as neuromorphic computing. Spintronic…

cond-mat.mes-hall2020★ 61 cited

Domain Wall-Magnetic Tunnel Junction Spin Orbit Torque Devices and Circuits for In-Memory Computing

Mahshid Alamdar, Thomas Leonard, Can Cui +8

There are pressing problems with traditional computing, especially for accomplishing data-intensive and real-time tasks, that motivate the development of in-memory computing device…

cs.NE2020

Device-aware inference operations in SONOS nonvolatile memory arrays

Christopher H. Bennett, T. Patrick Xiao, Ryan Dellana +10

Non-volatile memory arrays can deploy pre-trained neural network models for edge inference. However, these systems are affected by device-level noise and retention issues. Here, we…

cs.NE2020★ 2 cited

Unsupervised Competitive Hardware Learning Rule for Spintronic Clustering Architecture

Alvaro Velasquez, Christopher H. Bennett, Naimul Hassan +5

We propose a hardware learning rule for unsupervised clustering within a novel spintronic computing architecture. The proposed approach leverages the three-terminal structure of do…

cs.NE2020

Evaluating complexity and resilience trade-offs in emerging memory inference machines

Christopher H. Bennett, Ryan Dellana, T. Patrick Xiao +6

Neuromorphic-style inference only works well if limited hardware resources are maximized properly, e.g. accuracy continues to scale with parameters and complexity in the face of po…

cs.NE2020★ 3 cited

CMOS-Free Multilayer Perceptron Enabled by Four-Terminal MTJ Device

Wesley H. Brigner, Naimul Hassan, Xuan Hu +5

Neuromorphic computing promises revolutionary improvements over conventional systems for applications that process unstructured information. To fully realize this potential, neurom…

cs.DC2019★ 1 cited

PANTHER: A Programmable Architecture for Neural Network Training Harnessing Energy-efficient ReRAM

Aayush Ankit, Izzat El Hajj, Sai Rahul Chalamalasetti +7

The wide adoption of deep neural networks has been accompanied by ever-increasing energy and performance demands due to the expensive nature of training them. Numerous special-purp…

physics.app-ph2019★ 3 cited

Maximized Lateral Inhibition in Paired Magnetic Domain Wall Racetracks for Neuromorphic Computing

C. Cui, O. G. Akinola, N. Hassan +4

Lateral inhibition is an important functionality in neuromorphic computing, modeled after the biological neuron behavior that a firing neuron deactivates its neighbors belonging to…

physics.app-ph2019★ 66 cited

Shape-based Magnetic Domain Wall Drift for an Artificial Spintronic Leaky Integrate-and-Fire Neuron

Wesley H. Brigner, Naimul Hassan, Lucian Jiang-Wei +7

Spintronic devices based on domain wall (DW) motion through ferromagnetic nanowire tracks have received great interest as components of neuromorphic information processing systems.…

cs.ET2019

Using Floating Gate Memory to Train Ideal Accuracy Neural Networks

Sapan Agarwal, Diana Garland, John Niroula +7

Floating gate SONOS (Silicon-Oxygen-Nitrogen-Oxygen-Silicon) transistors can be used to train neural networks to ideal accuracies that match those of floating point digital weights…

physics.app-ph2017★ 9 cited

Electroforming-Free TaOx Memristors using Focused Ion Beam Irradiations

J. L. Pacheco, D. L. Perry, D. R. Hughart +2

We demonstrate creation of electroforming-free TaOx memristive devices using focused ion beam irradiations to locally define conductive filaments in TaOx films. Electrical characte…

cs.AR2017★ 184 cited

Multiscale Co-Design Analysis of Energy, Latency, Area, and Accuracy of a ReRAM Analog Neural Training Accelerator

Matthew J. Marinella, Sapan Agarwal, Alexander Hsia +6

Neural networks are an increasingly attractive algorithm for natural language processing and pattern recognition. Deep networks with >50M parameters are made possible by modern GPU…

cond-mat.mtrl-sci2014★ 9 cited

Degenerate Resistive Switching and Ultrahigh Density Storage in Resistive Memory

Andrew J. Lohn, Patrick R. Mickel, Conrad D. James +1

We show that, in tantalum oxide resistive memories, activation power provides a multi-level variable for information storage that can be set and read separately from the resistance…