11 citations · 30 across the 5 of their papers we have counts for
4 papers · 1 filter
Accelerating Non-volatile/Hybrid Processor Cache Design Space Exploration for Application Specific Embedded Systems
Mohammad Shihabul Haque, Ang Li, Akash Kumar +1
In this article, we propose a technique to accelerate nonvolatile or hybrid of volatile and nonvolatile processor cache design space exploration for application specific embedded s…
CIPARSim: Cache Intersection Property Assisted Rapid Single-pass FIFO Cache Simulation Technique
Mohammad Shihabul Haque, Jorgen Peddersen, Sri Parameswaran
In this paper, for the first time, we introduce a cache property called the Intersection Property that helps to reduce singlepass simulation time in a manner similar to inclusion p…
TRISHUL: A Single-pass Optimal Two-level Inclusive Data Cache Hierarchy Selection Process for Real-time MPSoCs
Mohammad Shihabul Haque, Akash Kumar, Yajun Ha +2
Hitherto discovered approaches analyze the execution time of a real time application on all the possible cache hierarchy setups to find the application specific optimal two level i…
DEW: A Fast Level 1 Cache Simulation Approach for Embedded Processors with FIFO Replacement Policy
Mohammad Shihabul Haque, Jorgen Peddersen, Andhi Janapsatya +1
Increasing the speed of cache simulation to obtain hit/miss rates en- ables performance estimation, cache exploration for embedded sys- tems and energy estimation. Previously, such…