85 citations · 113 across the 15 of their papers we have counts for
5 papers · 1 filter
Muchisim: A Simulation Framework for Design Exploration of Multi-Chip Manycore Systems
Marcelo Orenes-Vera, Esin Tureci, Margaret Martonosi +1
The design space exploration of scaled-out manycores for communication-intensive applications (e.g., graph analytics and sparse linear algebra) is hampered due to either lack of sc…
Tascade: Hardware Support for Atomic-free, Asynchronous and Efficient Reduction Trees
Marcelo Orenes-Vera, Esin Tureci, David Wentzlaff +1
Graph search and sparse data-structure traversal workloads contain challenging irregular memory patterns on global data structures that need to be modified atomically. Distributed…
DCRA: A Distributed Chiplet-based Reconfigurable Architecture for Irregular Applications
Marcelo Orenes-Vera, Esin Tureci, Margaret Martonosi +1
In recent years, the growing demand to process large graphs and sparse datasets has led to increased research efforts to develop hardware- and software-based architectural solution…
Dalorex: A Data-Local Program Execution and Architecture for Memory-bound Applications
Marcelo Orenes-Vera, Esin Tureci, David Wentzlaff +1
Applications with low data reuse and frequent irregular memory accesses, such as graph or sparse linear algebra workloads, fail to scale well due to memory bottlenecks and poor cor…
The MosaicSim Simulator (Full Technical Report)
Opeoluwa Matthews, Aninda Manocha, Davide Giri +7
As Moore's Law has slowed and Dennard Scaling has ended, architects are increasingly turning to heterogeneous parallelism and domain-specific hardware-software co-designs. These tr…