activity
20192021
most citedChip Placement with Deep Reinforcement Learning

152 citations · 207 across the 4 of their papers we have counts for

collaborators

5 papers

cs.LG202117 cited

Rethinking Co-design of Neural Architectures and Hardware Accelerators

Yanqi Zhou, Xuanyi Dong, Berkin Akin +7

Neural architectures and hardware accelerators have been two driving forces for the progress in deep learning. Previous works typically attempt to optimize hardware given a fixed m…

cs.LG202113 cited

Apollo: Transferable Architecture Exploration

Amir Yazdanbakhsh, Christof Angermueller, Berkin Akin +7

The looming end of Moore's Law and ascending use of deep learning drives the design of custom accelerators that are optimized for specific neural architectures. Architecture explor…

cs.LG2020

Transferable Graph Optimizers for ML Compilers

Yanqi Zhou, Sudip Roy, Amirali Abdolrashidi +9

Most compilers for machine learning (ML) frameworks need to solve many correlated optimization problems to generate efficient machine code. Current ML compilers rely on heuristics…

cs.LG2020152 cited

Chip Placement with Deep Reinforcement Learning

Azalia Mirhoseini, Anna Goldie, Mustafa Yazgan +19

In this work, we present a learning-based approach to chip placement, one of the most complex and time-consuming stages of the chip design process. Unlike prior methods, our approa…

cs.LG201925 cited

GDP: Generalized Device Placement for Dataflow Graphs

Yanqi Zhou, Sudip Roy, Amirali Abdolrashidi +8

Runtime and scalability of large neural networks can be significantly affected by the placement of operations in their dataflow graphs on suitable devices. With increasingly comple…