40 citations · 116 across the 10 of their papers we have counts for
10 papers
Co-design Hardware and Algorithm for Vector Search
Wenqi Jiang, Shigang Li, Yu Zhu +8
Vector search has emerged as the foundation for large-scale information retrieval and machine learning systems, with search engines like Google and Bing processing tens of thousand…
Python FPGA Programming with Data-Centric Multi-Level Design
Johannes de Fine Licht, Tiziano De Matteis, Tal Ben-Nun +5
Although high-level synthesis (HLS) tools have significantly improved programmer productivity over hardware description languages, developing for FPGAs remains tedious and error pr…
Temporal Vectorization: A Compiler Approach to Automatic Multi-Pumping
Carl-Johannes Johnsen, Tiziano De Matteis, Tal Ben-Nun +2
The multi-pumping resource sharing technique can overcome the limitations commonly found in single-clocked FPGA designs by allowing hardware components to operate at a higher clock…
Substream-Centric Maximum Matchings on FPGA
Maciej Besta, Marc Fischer, Tal Ben-Nun +3
Developing high-performance and energy-efficient algorithms for maximum matchings is becoming increasingly important in social network analysis, computational sciences, scheduling,…
StencilFlow: Mapping Large Stencil Programs to Distributed Spatial Computing Systems
Johannes de Fine Licht, Andreas Kuster, Tiziano De Matteis +3
Spatial computing devices have been shown to significantly accelerate stencil computations, but have so far relied on unrolling the iterative dimension of a single stencil operatio…
GeantV: Results from the prototype of concurrent vector particle transport simulation in HEP
G. Amadio, A. Ananya, J. Apostolakis +39
Full detector simulation was among the largest CPU consumer in all CERN experiment software stacks for the first two runs of the Large Hadron Collider (LHC). In the early 2010's, t…
Flexible Communication Avoiding Matrix Multiplication on FPGA with High-Level Synthesis
Johannes de Fine Licht, Grzegorz Kwasniewski, Torsten Hoefler
Data movement is the dominating factor affecting performance and energy in modern computing systems. Consequently, many algorithms have been developed to minimize the number of I/O…
Streaming Message Interface: High-Performance Distributed Memory Programming on Reconfigurable Hardware
Tiziano De Matteis, Johannes de Fine Licht, Jakub Beránek +1
Distributed memory programming is the established paradigm used in high-performance computing (HPC) systems, requiring explicit communication between nodes and devices. When FPGAs…
FBLAS: Streaming Linear Algebra on FPGA
Tiziano De Matteis, Johannes de Fine Licht, Torsten Hoefler
Spatial computing architectures pose an attractive alternative to mitigate control and data movement overheads typical of load-store architectures. In practice, these devices are r…
Stateful Dataflow Multigraphs: A Data-Centric Model for Performance Portability on Heterogeneous Architectures
Tal Ben-Nun, Johannes de Fine Licht, Alexandros Nikolaos Ziogas +2
The ubiquity of accelerators in high-performance computing has driven programming complexity beyond the skill-set of the average domain scientist. To maintain performance portabili…