7 citations · 24 across the 10 of their papers we have counts for
14 papers
Gate-Level Side-Channel Leakage Assessment with Architecture Correlation Analysis
Pantea Kiaei, Yuan Yao, Zhenyuan Liu +7
While side-channel leakage is traditionally evaluated from a fabricated chip, it is more time-efficient and cost-effective to do so during the design phase of the chip. We present…
An End-to-End Analysis of EMFI on Bit-sliced Post-Quantum Implementations
Richa Singh, Saad Islam, Berk Sunar +1
Bit-slicing is a software implementation technique that treats an N-bit processor datapath as N parallel single-bit datapaths. The natural spatial redundancy of bit-sliced software…
Leverage the Average: Averaged Sampling in Pre-Silicon Side-Channel Leakage Assessment
Pantea Kiaei, Zhenyuan Liu, Patrick Schaumont
Pre-silicon side-channel leakage assessment is a useful tool to identify hardware vulnerabilities at design time, but it requires many high-resolution power traces and increases th…
Signature Correction Attack on Dilithium Signature Scheme
Saad Islam, Koksal Mus, Richa Singh +2
Motivated by the rise of quantum computers, existing public-key cryptosystems are expected to be replaced by post-quantum schemes in the next decade in billions of devices. To faci…
Dimming Down LED: An Open-source Threshold Implementation on Light Encryption Device (LED) Block Cipher
Yuan Yao, Mo Yang, Pantea Kiaei +1
Lightweight block ciphers have been widely used in applications such as RFID tags, IoTs, and network sensors. Among them, with comparable parameters, the Light Encryption Device (L…
Real-time Detection and Adaptive Mitigation of Power-based Side-Channel Leakage in SoC
Pantea Kiaei, Yuan Yao, Patrick Schaumont
Power-based side-channel is a serious security threat to the System on Chip (SoC). The secret information is leaked from the power profile of the system while a cryptographic algor…