9 citations · 14 across the 10 of their papers we have counts for
10 papers
Hardware-accelerated Aggregation: Unification and Specialization
Alireza Shateri, Hongshi Tan, Michael Ng +2
The high efficiency of domain-specific hardware has sparked substantial interest in adopting accelerators in data analytics systems. Among many choices, GPUs and FPGAs thrived as t…
Is Agentic AI Ready for Real-World Hardware Engineering? A Deep Dive with Phoenix-bench
Qingyun Zou, Feng Yu, Hongshi Tan +2
We ask whether agentic AI systems built for software engineering transfer to realistic hardware engineering. Existing hardware LLM benchmarks isolate sub-tasks but none jointly req…
XtraMAC: An Efficient MAC Architecture for Mixed-Precision LLM Inference on FPGA
Feng Yu, Hongshi Tan, Yao Chen +2
The widespread adoption of mixed-precision quantization in large language models (LLMs) has created demand for hardware that can efficiently perform multiply-accumulate (MAC) opera…
HLS-Seek: QoR-Aware Code Generation for High-Level Synthesis via Proxy Comparative Reward Reinforcement Learning
Qingyun Zou, Feng Yu, Hongshi Tan +3
High-Level Synthesis (HLS) compiles algorithmic C/C++ descriptions into hardware, with Quality of Results (QoR)---latency and resource utilization---critically governed by pragma c…
RidgeWalker: Perfectly Pipelined Graph Random Walks on FPGAs
Hongshi Tan, Yao Chen, Xinyu Chen +4
Graph Random Walks (GRWs) offer efficient approximations of key graph properties and have been widely adopted in many applications. However, GRW workloads are notoriously difficult…
LightRW: FPGA Accelerated Graph Dynamic Random Walks
Hongshi Tan, Xinyu Chen, Yao Chen +2
Graph dynamic random walks (GDRWs) have recently emerged as a powerful paradigm for graph analytics and learning applications, including graph embedding and graph neural networks.…
ReGraph: Scaling Graph Processing on HBM-enabled FPGAs with Heterogeneous Pipelines
Xinyu Chen, Yao Chen, Feng Cheng +3
The use of FPGAs for efficient graph processing has attracted significant interest. Recent memory subsystem upgrades including the introduction of HBM in FPGAs promise to further a…
ThundeRiNG: Generating Multiple Independent Random Number Sequences on FPGAs
Hongshi Tan, Xinyu Chen, Yao Chen +2
In this paper, we propose ThundeRiNG, a resource-efficient and high-throughput system for generating multiple independent sequences of random numbers (MISRN) on FPGAs. Generating M…
Skew-Oblivious Data Routing for Data-Intensive Applications on FPGAs with HLS
Xinyu Chen, Hongshi Tan, Yao Chen +3
FPGAs have become emerging computing infrastructures for accelerating applications in datacenters. Meanwhile, high-level synthesis (HLS) tools have been proposed to ease the progra…
HaoCL: Harnessing Large-scale Heterogeneous Processors Made Easy
Yao Chen, Xin Long, Jiong He +5
The pervasive adoption of Deep Learning (DL) and Graph Processing (GP) makes it a de facto requirement to build large-scale clusters of heterogeneous accelerators including GPUs an…