3 papers
eess.SP2020
In-memory Implementation of On-chip Trainable and Scalable ANN for AI/ML Applications
Abhash Kumar, Jawar Singh, Sai Manohar Beeraka +1
Traditional von Neumann architecture based processors become inefficient in terms of energy and throughput as they involve separate processing and memory units, also known as~\text…
cond-mat.mes-hall2019
Improvement in Retention Time of Capacitorless DRAM with Access Transistor
Md. Hasan Raza Ansari, Jawar Singh
In this paper, we propose a Junctionless (JL)/Accumulation Mode (AM) transistor with an access transistor (JL in series with JL/AM transistor) based capacitorless Dynamic Random Ac…
cond-mat.mes-hall2019
Ultra-Low Energy and High Speed LIF Neuron using Silicon Bipolar Impact Ionization MOSFET for Spiking Neural Networks
Alok Kumar Kamal, Jawar Singh
Silicon bipolar impact ionization MOSFET offers the potential for realization of leaky integrated fire (LIF) neuron due to the presence of parasitic BJT in the floating body. In th…