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Shidhartha Das

5 papers hereh-index 204.4k citations91 works total

Matching runs newest-first, so older work may not be attached to this profile yet.

author position
  • middle author3
  • last author2

Across the 5 of 5 papers where every author was matched, so the position is known.

fields
  • cs.AR3
  • cs.LG1
  • eess.SP1

identity via Semantic Scholar / OpenAlex

activity
20192021
most citedStack up your chips: Betting on 3D integration to augment Moore's Law scaling

10 citations · 37 across the 5 of their papers we have counts for

collaborators
Showing cs.ARShow all

3 papers · 1 filter

cs.AR2021★ 8 cited

AnalogNets: ML-HW Co-Design of Noise-robust TinyML Models and Always-On Analog Compute-in-Memory Accelerator

Chuteng Zhou, Fernando Garcia Redondo, Julian Büchel +7

Always-on TinyML perception tasks in IoT applications require very high energy efficiency. Analog compute-in-memory (CiM) using non-volatile memory (NVM) promises high efficiency a…

cs.AR2021★ 3 cited

A System-Level Voltage/Frequency Scaling Characterization Framework for Multicore CPUs

George Papadimitriou, Manolis Kaliorakis, Athanasios Chatzidimitriou +4

Supply voltage scaling is one of the most effective techniques to reduce the power consumption of microprocessors. However, technology limitations such as aging and process variabi…

cs.AR2020★ 10 cited

Stack up your chips: Betting on 3D integration to augment Moore's Law scaling

Saurabh Sinha, Xiaoqing Xu, Mudit Bhargava +3

3D integration, i.e., stacking of integrated circuit layers using parallel or sequential processing is gaining rapid industry adoption with the slowdown of Moore's law scaling. 3D…

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Not affiliated with arXiv. Researcher data from Semantic Scholar (ODC-BY) and OpenAlex.