67 citations · 126 across the 22 of their papers we have counts for
29 papers
REPQC: Reverse Engineering and Backdooring Hardware Accelerators for Post-quantum Cryptography
Samuel Pagliarini, Aikata Aikata, Malik Imran +1
Significant research efforts have been dedicated to designing cryptographic algorithms that are quantum-resistant. The motivation is clear: robust quantum computers, once available…
Multiplierless Design of High-Speed Very Large Constant Multiplications
Levent Aksoy, Debapriya Basu Roy, Malik Imran +1
In cryptographic algorithms, the constants to be multiplied by a variable can be very large due to security requirements. Thus, the hardware complexity of such algorithms heavily d…
SALSy: Security-Aware Layout Synthesis
Mohammad Eslami, Tiago Perez, Samuel Pagliarini
Integrated Circuits (ICs) are the target of diverse attacks during their lifetime. Fabrication-time attacks, such as the insertion of Hardware Trojans, can give an adversary access…
Impact of Orientation on the Bias of SRAM-Based PUFs
Zain Ul Abideen, Rui Wang, Tiago Diadami Perez +2
This paper investigates the impact of memory orientation on the bias pattern of SRAM-based PUFs. We designed and fabricated a 65nm CMOS chip that contains eleven SRAM macros that e…
An Overview of FPGA-inspired Obfuscation Techniques
Zain Ul Abideen, Sumathi Gokulanathan, Muayad J. Aljafar +1
Building and maintaining a silicon foundry is a costly endeavor that requires substantial financial investment. From this scenario, the semiconductor business has largely shifted t…
Hybrid Protection of Digital FIR Filters
Levent Aksoy, Quang-Linh Nguyen, Felipe Almeida +4
A digital Finite Impulse Response (FIR) filter is a ubiquitous block in digital signal processing applications and its behavior is determined by its coefficients. To protect filter…
Resynthesis-based Attacks Against Logic Locking
F. Almeida, L. Aksoy, Q-L. Nguyen +3
Logic locking has been a promising solution to many hardware security threats, such as intellectual property infringement and overproduction. Due to the increased attention that th…
Leveraging Layout-based Effects for Locking Analog ICs
Muayad J. Aljafar, Florence Azais, Marie-Lise Flottes +1
While various obfuscation methods exist in the digital domain, techniques for protecting Intellectual Property (IP) in the analog domain are mostly overlooked. Understandably, anal…
A Pragmatic Methodology for Blind Hardware Trojan Insertion in Finalized Layouts
Alexander Hepp, Tiago Perez, Samuel Pagliarini +1
A potential vulnerability for integrated circuits (ICs) is the insertion of hardware trojans (HTs) during manufacturing. Understanding the practicability of such an attack can lead…
A Security-aware and LUT-based CAD Flow for the Physical Synthesis of eASICs
Zain UlAbideen, Tiago Diadami Perez, Mayler Martins +1
Numerous threats are associated with the globalized integrated circuit (IC) supply chain, such as piracy, reverse engineering, overproduction, and malicious logic insertion. Many o…
Obfuscating the Hierarchy of a Digital IP
Giorgi Basiashvili, Zain Ul Abideen, Samuel Pagliarini
Numerous security threats are emerging from untrusted players in the integrated circuit (IC) ecosystem. Among them, reverse engineering practices with the intent to counterfeit, ov…
Multiplierless Design of Very Large Constant Multiplications in Cryptography
Levent Aksoy, Debapriya Basu Roy, Malik Imran +2
This brief addresses the problem of implementing very large constant multiplications by a single variable under the shift-adds architecture using a minimum number of adders/subtrac…
Preventing Distillation-based Attacks on Neural Network IP
Mahdieh Grailoo, Zain Ul Abideen, Mairo Leier +1
Neural networks (NNs) are already deployed in hardware today, becoming valuable intellectual property (IP) as many hours are invested in their training and optimization. Therefore,…
Hardware Obfuscation of Digital FIR Filters
Levent Aksoy, Alexander Hepp, Johanna Baehr +1
A finite impulse response (FIR) filter is a ubiquitous block in digital signal processing applications. Its characteristics are determined by its coefficients, which are the intell…
Reusing Verification Assertions as Security Checkers for Hardware Trojan Detection
Mohammad Eslami, Tara Ghasempouri, Samuel Pagliarini
Globalization in the semiconductor industry enables fabless design houses to reduce their costs, save time, and make use of newer technologies. However, the offshoring of Integrate…
G-GPU: A Fully-Automated Generator of GPU-like ASIC Accelerators
Tiago Diadami Perez, Márcio M. Gonçalves, José Rodrigo Azambuja +3
Modern Systems on Chip (SoC), almost as a rule, require accelerators for achieving energy efficiency and high performance for specific tasks that are not necessarily well suited fo…
Hardware Trojan Insertion in Finalized Layouts: From Methodology to a Silicon Demonstration
Tiago Perez, Samuel Pagliarini
Owning a high-end semiconductor foundry is a luxury very few companies can afford. Thus, fabless design companies outsource integrated circuit fabrication to third parties. Within…
From FPGAs to Obfuscated eASICs: Design and Security Trade-offs
Zain Ul Abideen, Tiago Diadami Perez, Samuel Pagliarini
Threats associated with the untrusted fabrication of integrated circuits (ICs) are numerous: piracy, overproduction, reverse engineering, hardware trojans, etc. The use of reconfig…
Design Space Exploration of SABER in 65nm ASIC
Malik Imran, Felipe Almeida, Jaan Raik +3
This paper presents a design space exploration for SABER, one of the finalists in NIST's quantum-resistant public-key cryptographic standardization effort. Our design space explora…
A Tutorial on Design Obfuscation: from Transistors to Systems
Samuel Pagliarini
The recent advances in the area of design obfuscation are encouraging, but may present themselves as hard to read for a non-specialist audience. This tutorial uncovers these advanc…
A Terabit Hybrid FPGA-ASIC Platform for Switch Virtualization
Mateus Saquetti, Raphael M. Brum, Bruno Zatt +3
The roll-out of technologies like 5G and the need for multi-terabit bandwidth in backbone networks requires networking companies to make significant investments to keep up with gro…
High-level Intellectual Property Obfuscation via Decoy Constants
Levent Aksoy, Quang-Linh Nguyen, Felipe Almeida +4
This paper presents a high-level circuit obfuscation technique to prevent the theft of intellectual property (IP) of integrated circuits. In particular, our technique protects a cl…
Side-Channel Attacks on Triple Modular Redundancy Schemes
Felipe Almeida, Levent Aksoy, Jaan Raik +1
The interplay between security and reliability is poorly understood. This paper shows how triple modular redundancy affects a side-channel attack (SCA). Our counterintuitive findin…
Side-Channel Trojan Insertion -- a Practical Foundry-Side Attack via ECO
Tiago Perez, Malik Imran, Pablo Vaz +1
Design companies often outsource their integrated circuit (IC) fabrication to third parties where ICs are susceptible to malicious acts such as the insertion of a side-channel hard…