activity
20202023
most citedAutomatic Microprocessor Performance Bug Detection

4 citations · 8 across the 7 of their papers we have counts for

collaborators

7 papers

cs.AR2023

Machine Learning for Microprocessor Performance Bug Localization

Erick Carvajal Barboza, Mahesh Ketkar, Michael Kishinevsky +2

The validation process for microprocessors is a very complex task that consumes substantial engineering time during the design process. Bugs that degrade overall system performance…

cs.DC2022

End-to-End Application Cloning for Distributed Cloud Microservices with Ditto

Mingyu Liang, Yu Gan, Yueying Li +4

We present Ditto, an automated framework for cloning end-to-end cloud applications, both monolithic and microservices, which captures I/O and network activity, as well as kernel op…

cs.DC2021★ 3 cited

Tools and Algorithms for SoC Communication Traces

Md Rubel Ahmed, Hao Zheng

In this paper, we study seven well-known trace analysis techniques both from the hardware and software domain and discuss their performance on communication-centric system-on-chip…

cs.IR2021★ 1 cited

Model Synthesis for Communication Traces of System-on-Chip Designs

Hao Zheng, Md Rubel Ahmed, Parijat Mukherjee +2

Concise and abstract models of system-level behaviors are invaluable in design analysis, testing, and validation. In this paper, we consider the problem of inferring models from co…

cs.AR2020★ 4 cited

Automatic Microprocessor Performance Bug Detection

Erick Carvajal Barboza, Sara Jacob, Mahesh Ketkar +3

Processor design validation and debug is a difficult and complex task, which consumes the lion's share of the design process. Design bugs that affect processor performance rather t…

cs.SE2020

Mining Message Flows from System-on-Chip Execution Traces

MD Rubel Ahmed, Hao Zheng, Parijat Mukherjee +2

Comprehensive and well-defined specifications are necessary to perform rigorous and thorough validation of system-on-chip (SoC) designs. Message flows specify how components of an…

cs.DC2020

Mining Message Flows using Recurrent Neural Networks for System-on-Chip Designs

Yuting Cao, Parijat Mukherjee, Mahesh Ketkar +2

Comprehensive specifications are essential for various activities across the entire validation continuum for system-on-chip (SoC) designs. However, specifications are often ambiguo…