4 citations · 5 across the 4 of their papers we have counts for
4 papers
Model Synthesis for Communication Traces of System-on-Chip Designs
Hao Zheng, Md Rubel Ahmed, Parijat Mukherjee +2
Concise and abstract models of system-level behaviors are invaluable in design analysis, testing, and validation. In this paper, we consider the problem of inferring models from co…
Automatic Microprocessor Performance Bug Detection
Erick Carvajal Barboza, Sara Jacob, Mahesh Ketkar +3
Processor design validation and debug is a difficult and complex task, which consumes the lion's share of the design process. Design bugs that affect processor performance rather t…
Mining Message Flows from System-on-Chip Execution Traces
MD Rubel Ahmed, Hao Zheng, Parijat Mukherjee +2
Comprehensive and well-defined specifications are necessary to perform rigorous and thorough validation of system-on-chip (SoC) designs. Message flows specify how components of an…
Mining Message Flows using Recurrent Neural Networks for System-on-Chip Designs
Yuting Cao, Parijat Mukherjee, Mahesh Ketkar +2
Comprehensive specifications are essential for various activities across the entire validation continuum for system-on-chip (SoC) designs. However, specifications are often ambiguo…