124 citations · 306 across the 20 of their papers we have counts for
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cs.AR2020★ 1 cited
Reducing Solid-State Drive Read Latency by Optimizing Read-Retry (Extended Abstract)
Jisung Park, Myungsuk Kim, Myoungjun Chun +3
3D NAND flash memory with advanced multi-level cell techniques provides high storage density, but suffers from significant performance degradation due to a large number of read-ret…
cs.AR2020★ 9 cited
CLR-DRAM: A Low-Cost DRAM Architecture Enabling Dynamic Capacity-Latency Trade-Off
Haocong Luo, Taha Shahroodi, Hasan Hassan +5
DRAM is the prevalent main memory technology, but its long access latency can limit the performance of many workloads. Although prior works provide DRAM designs that reduce DRAM ac…