12 citations · 16 across the 8 of their papers we have counts for
9 papers
A Simple Hybrid Model for Accurate Delay Modeling of a Multi-Input Gate
Arman Ferdowsi, Jürgen Maier, Daniel Öhlinger +1
Faithfully representing small gate delay variations caused by input switchings on different inputs in close temporal proximity is a very challenging task for digital delay models.…
Gain and Pain of a Reliable Delay Model
Jürgen Maier
State-of-the-art digital circuit design tools almost exclusively rely on pure and inertial delay for timing simulations. While these provide reasonable estimations at very low exec…
A Composable Glitch-Aware Delay Model
Jürgen Maier, Daniel Öhlinger, Ulrich Schmid +2
We introduce the Composable Involution Delay Model (CIDM) for fast and accurate digital simulation. It is based on the Involution Delay Model (IDM) [Függer et al., IEEE TCAD 2020],…
Efficient Metastability Characterization for Schmitt-Triggers
Jürgen Maier, Andreas Steininger
Despite their attractiveness as metastability filters, Schmitt-Triggers can suffer from metastability themselves. Therefore, in the selection or construction of a suitable Schmitt-…
Does Cascading Schmitt-Trigger Stages Improve the Metastable Behavior?
Andreas Steininger, Robert Najvirt, Jürgen Maier
Schmitt-Trigger stages are the method of choice for robust discretization of input voltages with excessive transition times or significant noise. However, they may suffer from meta…
The Metastable Behavior of a Schmitt-Trigger
Andreas Steininger, Jürgen Maier, Robert Najvirt
Schmitt-Trigger circuits are the method of choice for converting general signal shapes into clean, well-behaved digital ones. In this context these circuits are often used for meta…
Online Test Vector Insertion: A Concurrent Built-In Self-Testing (CBIST) Approach for Asynchronous Logic
Jürgen Maier, Andreas Steininger
Complementing concurrent checking with online testing is crucial for preventing fault accumulation in fault-tolerant systems with long mission times. While implementing a non-intru…
A Faithful Binary Circuit Model with Adversarial Noise
Matthias Függer, Jürgen Maier, Robert Najvirt +2
Accurate delay models are important for static and dynamic timing analysis of digital circuits, and mandatory for formal verification. However, Függer et al. [IEEE TC 2016] proved…
Verifying nonlinear analog and mixed-signal circuits with inputs
Chuchu Fan, Yu Meng, Jürgen Maier +3
We present a new technique for verifying nonlinear and hybrid models with inputs. We observe that once an input signal is fixed, the sensitivity analysis of the model can be comput…